Intel 8XC251SA - Iph1; Ipl1; Table 10. IPL1 Special Function Register Definitions; Table 11. Interrupt Priority of Second Serial IO Port

To Next Page

To Previous Page

8xC251Tx Hardware Description

3.2.6 IE1

Address: B1H

Reset Value: xxxx xxx0B

3.2.7 IPH1

Address: B3H

Reset Value: xxxx xxx0B

3.2.8 IPL1

Address: B2H

Reset Value: xxxx xxx0B

Interrupt priority of the second serial I/O port can be programmed to one of four levels depending on the

IPH1.0 and IPL1.0 bits.

Table 8. IE1 Special Function Register Definitions

Bit Number

Bit Mne-

monic

Function

7 - 1 - Reserved

0 ES1 Second serial I/O port Interrupt Enable:

Setting this bit enables the second serial I/O port interrupt

Table 9. IPH1 Special Function Register Definitions

Bit Number

Bit Mne-

monic

Function

7 - 1 - Reserved

0 IPH1.0 Second serial I/O port Interrupt Priority High Bit

Table 10. IPL1 Special Function Register Definitions

Bit Number

Bit Mne-

monic

Function

7 - 1 - Reserved

0 IPL1.0 Second serial I/O port Interrupt Priority Low Bit

Table 11. Interrupt Priority of Second Serial I/O Port

IPH1.0 IPL1.0 Priority Level

0 0 0 (Lowest Priority)

0 1 1

1 0 2

1 1 3 (Highest Priority)

Other manuals for Intel 8XC251SA