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Intel ICH9 User Manual

Intel ICH9
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NVM Information Guide—ICH8/ICH9
18
1.4.18 LED 0 and 2 Configuration Defaults (Word 18h)
This NVM word specifies the hardware defaults for the LEDCTL register fields controlling
the LED0 (LINK_UP; LINK/ACTIVITY for ICH9) and LED2 (LINK_100) output behaviors.
Table 15, “LED Modes” above summarizes the LED modes defined in bits 3:0 of this
word.
1.4.19 Future Initialization Word 1 (Words 19h)
Table 16. LED 0 and 2 Configuration Defaults (Word 18h)
Bit Name Default Description
15 LED2 Blink 0b
This bit indicates the initial value of the LED2_BLINK field.
0b = LED2 is non-blinking.
1b = LED2 is blinking.
14 LED2 Invert 0b
This bit indicates the initial value of the LED2_IVRT field.
0b = LED2 has an active low output.
1b = LED2 has an active high output.
13 LED2 Blink Mode 0b
This bit defines the LED2 blink mode:
0b = Blink at 200 ms on and 200 ms off (slow rate for ICH9).
1b = Blink at 83 ms on and 83 ms off (fast rate for ICH9).
For ICH8, this field should be identical to the LED0 Blink Mode.
12 Reserved 0b This bit is reserved and should be set to 0b.
11:8 LED2 Mode 0110b
These bits represent the initial value of the LED2_MODE field,
which specifies the event, state, or pattern displayed on LED2
(LINK_100) output. A value of 0110b causes this to indicate 100
Mb/s operation.
7 LED0 Blink 1b
This bit indicates the initial value of the LED0_BLINK field.
0b = LED0 is non-blinking (recommended).
1b = LED0 is blinking.
6 LED0 Invert 0b
This bit indicates the initial value of the LED0_IVRT field.
0b = LED0 has an active low output.
1b = LED0 has an active high output.
5 LED0 Blink Mode 0b
This bit define the LED0 blink mode:
0b = Blink at 200 ms on and 200 ms off (slow rate for ICH9).
1b = Blink at 83 ms on and 83 ms off (fast rate for ICH9).
For ICH8, this field initializes the GLOBAL_BLINK_MODE field in
the LEDCTL register.
4 Reserved 0b This bit is reserved and should be set to 0b.
3:0 LED0 Mode 0100b
These bits represent the initial value of the LED0_MODE field,
which specifies the event, state, or pattern displayed on LED0
(Link/Activity; LINK_UP/Activity for ICH9) output. Tab le 15 defines
the values for LED0 Mode.
Bit Name Default Description
15:0 Reserved
Reserved
This field is loaded to bits 15:0 of the FEXTNVM register.
For the 82562V, must be set to 301h.
For 82566 SKUs that include ACBS, must be set to 181h.
For 82566 SKUs without ACBS, must be set to 101h.
For the 82567, must be set to TBDF.

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Intel ICH9 Specifications

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BrandIntel
ModelICH9
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LanguageEnglish

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