ITech IT8500plus Series - Page 22

22
1
st
byte
Start bit ( AAH )
2
th
byte
Address (0—31,0XFF)
3
th
byte
Command（02H/03H）
From 4
th
to 7
th
byte
OPP value (Lower bytes are in the former location, higher bytes are
in the later location)
From 8
th
to 25
th
byte
System reserve
26
th
byte
Sum code
31. Set / Read OCP value. (80H/81H)
1
st
byte
Start bit ( AAH )
2
th
byte
Address (0—31,0XFF)
3
th
byte
Command（80H/81H）
From 4
th
to 7
th
byte
OCP value (Lower bytes are in the former location, higher bytes are
in the later location)
From 8
th
to 25
th
byte
System reserve
26
th
byte
Sum code
32. Set / Read OCP delay time.( 82H/83H)
1
st
byte
Start bit ( AAH )
2
th
byte
Address (0—31,0XFF)
3
th
byte
Command（82H/83H）
From 4
th
Delay time
From 5
th
to 25
th
byte
System reserve
26
th
byte
Sum code
33. Enable/Disable OCP function.( 84H/85H)
1
st
byte
Start bit ( AAH )
2
th
byte
Address (0—31,0XFF)
3
th
byte
Command（84H/85H）
From 4
th
Set OCP state (0:off 1:on)
From 5
th
to 25
th
byte
System reverse
26
th
byte
Sum code
34. Set/Enquire software OPP value. (86H/87H)
1
st
byte
Start bit ( AAH )
2
th
byte
Address (0—31,0XFF)
3
th
byte
Command（86H/87H）
From 4
th
to 7
th
byte
Software OPP value (Lower bytes are in the former location,
higher bytes are in the later location)