JVC DD-9 A - Electrical Circuit Adjustment Location; Main Amp. P.W. Board (Parts Assy side view); Computer P.W. Board (Parts Assy side view)

DD-9A/B/C/E/J/U
[MI] Electrical circuit adjustment location
= Main Amp. P.W. Board (Parts Ass’y side view)
= a ee e Ecnaeee
vRpoe vR201
( | aR
H \
U VRBO!
R
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PY en
i XY
I-— Encoder (Recording) R
i calibration Dolby C adj.
Decoder (Piayback) ;
calibration Dolby C + - Playback level adj.
: adj. i (Turning inthe direction
1 | of the arrow increases
L \ i the playback levels.)
| L
1 TPIO2 | |
TPIO4
(1
a
TEIO!
!
2 VRAO2 CG | A
VRAO! C100 \} 7-PB frequency
1 sf, response.
' R100 ai
( 1
\
| TPIO3 RIO! |
| o
Computer playback gain adj.
i
LR
Cl ~—Recording level adj.
' {Turning in the direction of the arrow
Secon sees | increases the recording levels.)
| nn Bias adj.
R : {Turning in the direction
i of the arrow increases
! |
ab the bias current value.)
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VR205}
LA
Front
vrios
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(Ft Revel ad). i KERR a
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\VR208
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VR207
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Fig. 14
= Computer P.W. Board (Parts Ass’y side view)
58
a
21m CUT R
c- A/D test point
7 m For reference sign! output
¥RGOS mout-L level adjustment
7 __ (Turning in the direction of
ALD output adjustment the arrow increases the out-
(Turning in the direction put levels.)
TEST H of the arrow increases
bs the output levels.) p—-—IKHZ
&
2 125
1603
- KHZ
fea Clock OSC adjustment
—one—f
Clock osc 400 kHz y Computer IC
test point 3
———4KHZ
® se
Oo @ Monitor H
pa “ XGO4
Front @ Monitor L ef
Q@ VRGO4 f
Oo 7 __ Bias voltage adjustment
XN (Turning in the direction of
\ the arrow increases the refer-—
ence voltage at Metal tape.)
Fig. 15
No. 4198
—-11—