JVC GR-DVL155EG - 4.30 Video System Block Diagram

1
2
3
5
4
ABCD EFGH
VIDEO SYSTEM BLOCK DIAGRAM4.30
4-644-63
IC1007
MAIN
CAMAD
SRV_JTX
AV OUT
J501
J553
USB
DSC MODEL
WITH
J552
PC
DSC MODEL
WITHOUT
J503
JLIP
0 7
REAR
0 6JACK
0 6JACK
75
12 12
(
Y_OUT
)
AMP
9
11
C3712
12
14
75
DRV
6dB
75
6dB
DRV
DRV
7
2
+
Q3701
AMP
3
(
C_OUT
)
DV_ C
V_OUT
CN502 CN103
V OUT
USB_DP_TX
USB_DN_RX
R558
R557
7
R555
R556
6
USB_DN_RX
6
USB_DP_TX
7
C3713
15
IC3701
6dB
CN502
4
3
JLIP_RX
JLIP_TX
CN102
CN551 CN103
4
3
D1302
DRIVE
GND
2
DUMP
1
DUMP
7
6
Q1301
AL3VSYS
4
IC1303
5
6
IC1303 IC1303
3
2
1
12
11
13
AMP
MOTOR
DRIVE
PC IF
2
1
Q3701
5
DV_ Y
TO CAM.DSP
BLKB
(
BLK1
)
BLKA
(
VBLK
)
IC1006
(
ON SCREEN
)
VC1
(
VF_G
)
17
IF_TX
JLIP_L
IF_RX
TO CAM.DSP
13
14
VC3
(
VC1
)
15
16
VC2
(
VF_R
)
OP DRV
VF_B 18
VCO
DOT_CLK
TBC_CLK
OSD_HD
OSD_CS
OSD_VD
TBC_DTO
VD
EXD
HD
CAM.DSP
TO
19
8
20
SCLK
DATA
CS
1
2
3
VTRCPU
TO
IF_RX
IC1007
TX
6
RX
IC1008_1PIN
AL_3V
5
4
TO
3
CLK
(
CLK OUT
)
DATA
(
DATA OU T
)
17
SHP
SERIAL-
DECODER
PARARELLE
ZOOM04
23
12
ZOOM01
ZOOM03
HG_VSS
HG_OUT
HG_OUT
HG_VCC
8
3
5
4
24
22
16
14
ZOOM02
FOCUS02
FOCUS04
FOCUS01
FOCUS03
21
14
16
10
30
28
CN108
17
15
26
24
DRIVER
IC4802 IC4804
AMP
HALL
DRIVER
BRIDGE
GENERATOR
BRIDGE
BRIDGE
DRIVER
DRIVER
BRIDGE
PULSE
V441
IRIS CTL
CN107
20 19 18
V1 V3 V2
40 42 44
V2 V1 V3
CN5201
20 19 18
(TG & V.Driver)
IC5501
3
17
1 5 4
H2
RG
SUB
V4
H1
8 45 11 14
3
RG
SUB
H2 H1
5
17
1 4
OBCLP
37
CXO
IRIS_C
IRIS_O/C
HALL_AD
TG_RST
F/Z_CS
DATA_OUT
CLK_OUT
CAM_VD
CLK45
33LATCH
RESET
IC4851
38
OSCIN
SCLK
SDATA 34
35
36
32VD
11
IC1007
8
IC1007
REG_3V
XAHD
NC
26
TG_RST
PBLK
CK
CAM/VTR
38
2
1
22
25
TG_CS
CLK27
CLK13
CLK18
ID
30
27
28
35
34
X5501
54MHz
34
DATA_OUT
SHD
XAVD
VGAT
18
31
32
5
OBP
SHD
SHP
CLK_OUT
CDS_CS
CLK18
CN107
1
CCD
BLOCK
OP
3 4
V1
2
V3 V2
04
Q5201
H2 VSUB SUB
10
RG
13
V4
11
H1
12
16 16
CCD_CTL 6
(
CCD
)
VOUT
8
IC5201
CN5201
Q5202
BUF
10
OUT
CCD
10
47
IC4201(CDS/AGC/AD)
OBP
CDSIN
20
30
SPBLK CS SPSIG
22 21
SCK
48 46
ADCLK SDATA
16
D0
2
D9
11
01
MON_B
SD/MMC
CARD
V_REF
LCD BL
LCD MODULE
VF BL
29 12
Rin
14
BUF
Q4301
20
21
S_DT_OUT
21
S_CLK
20
BOUT2
IC7603
6
SCK
5
SI
39
SCLK
CN763
17
19
18
OPEN
C-VF
CN751
CVF_R
CVF_G
CVF_B
Q4302
B-Y_OUT
R-Y_OUT
Y2_OUT
5
BUF
3
1
3
Q4301
BUF
2
2
5
Q4302
BUF
1
25 16
27
34
9
40
LCD_B
LCD_R
LCD_G
14
7
Y_OUT
C_OUT
1
32
CN101
LCD_Y/BW_Y
CN761
71
63
61
SRV_RDY
SRV_CS
SRV_RST
DSC_RST
CAPT_REQ
34
JLIP_INT
16
332
1
3
2
1
TXD
RXD
73
149
JLIP_L
PD_L
A_MUTE
148
AUDIO_CS
159
DSC_DT_IN
3
DSC_PCTL
4
USBDOWN
18
DSC_STS
19
MXDT_OUT
165
DSC_CLK
17
FLSH_RST
167
DSC_CS
118
100
DSC_DT_OUT
2
174
0
CN7001
ROUT2
GOUT2
ROUT1
GOUT1
BOUT1
IC7601
1
47
48
Bin
Gin
18
16
4
6
8
Q7101
AMP
CN763
64 12
BW-Y
1
CN764
25
24
23
9 5 6
CN751
24
03
23
22
MON_R
MON_G
CN766
2 9 6 8
CN762
08 B/W VF
CN7002
MONITOR2
D11/CIN3
D8/CIN0
DO/YIN0
3
57
6
135
14
134
15 16 17
SWCK/MCLK
D7/YIN7
RSTW/WAD
WE/FMWE
7
132
203
48
130
IC4302
(
FILED MEMORY
)
18
34 37
Q8/COUT0
IE
Q11/COUT3
199
49
198
26 33
25 24
Q0/YOUT0 Q7/YOUT7
SRCK/MCLK
RSTR/RAD
261 257
203 200
LCD MODULE
CN752
R_OUT
G_OUT
B_OUT
B
R
G
LCD MODULE
TO DSC
CN752
17
16
15
B
G
R
TO DSC
22 23
RE/FMRE
0E/RAE
201
50
e
MEMO
OUT
44
GEN
CLK
F/Z_CS
142
S_DT_OUT
47
13
49
127
85
12
HALL_AD
DATA _O U T
IRIS_O/C
62
107
9
10
CLK_OUT
DSP_RST
S_CLK
S_DT_IN
32
48
144
16MHz
OSCI
112
158
X1001
CDS_CS
OSCO
41
DATA_IN
46
BUS15
BUS0
7
FLD
108
DSP_RST
107
157
CLKOSD
(
DOT_CLK
)
155
225
BLK1
81
80
VC1
VBLK
VR
VDOSD
HDOSD
285
82
VG
VB
226
84
230
166
16
BUS15
FLDCPU
(
MFLD
)
BUS0
161
CLR
124
CLK_OUT
DATA_IN
AREG_SO
EEP_DT_OUT
EEP_DT_CLK
(
SYSCON CPU
)
133
105
106
MVD
TGFZ_RST
TG_CS
111
CCD_CTL
VD
6
7
32KHz
X1002
XOUT
XIN
OMT
135
IC1001
(
RTC
)
IC1002
2
CLK
SIO
3
(
EPROM
)
IC1003
2
SCK
SI
SO
2
6
5
PBLK
CAM_VD
MVD
158
VDMDA
242
99
227
PBLK
GT_X
OMT
100
PWM
VDCVF
B-YOUT
HDCVF
160
20
CLK45
27
175
VGAT
XAHD
XAVD
EEP_IN
HDTG
Y2_OUT
R-YOUT
Y_OUT
C_OUT
183
182
181
253
109
LMFO
189
116
123
VDTG
ID
42
45
CLK13
CLK18
CLK27
DSC
I/F
Y
TMC3
C
TMC0
TMY0
MCLK
TMY7
WAD FMWE1
MEMO
OUT
OSD
CONTROL
I/F
CPU
DAC
MEMO
FMC0
IE1
C
FMC3
IN
Y
FMY0 FMY7
MCLK RAD
FMC
EIS
AUTO
HNR
Y/C
I/F
EVR
OUT
ANA
RY/GY/BY
CVF
DAC
SELECT
SENC
ENC
DAC
Y/C
DSC
IN
/OUT
I/F
DSC
IWD
OUT
DVC
I/F
DVC
IC4301
(
CAM.DSP
)
CAM_AD90
DSP_RST
118
10
ADIN0
124
41
CLR
ADIN9
CONV
AD
KIZU
DVC
IN
143
PRE/REC
DECKCPU
DVMAIN
ATF_GAIN
EOUT2
280
RECCADJ
FMRE1 RAE1
EOUT1
149
FSPLLCTL
M_VCOCTL
EOUT6
EOUT5
ACO0
ACO3
151
281
114
35
FLDDSC
HDDSC
AYO 0
AYO 3
33
32
141
TO
d
TO DSC
TO DVMAIN
171
CLKDSC
VDDSC
DSCI0
DSCI7
211
212
217
66
OUTV
OUTH
DSYI7
DSYI0 146
213
DSCO0
DSCO7
140
62
DSYO7
DSYO0 137
59
96
16DCO0
INH
INV
DCO3
173
172
98
DYO0
DYO3
174
240
c
b
a
DVMAIN
DCI0
DCI3
DYI3
DYI0
95
11
13
12
TO
SW
CCD_CTL
SW
Q4802
SW
Q4803
Q4805
~
IRIS_PWN TO IC4301_158Pin
TO CN111-11PIN
TO CN111-51PIN
IC1302
8
13 11
9
IC1301 IC1301
IC1301
12
13
11
9
10
8
R1308
R1307
1
J7601
S OUT
3
2
4
NC
With DSC MODEL
1 WITH DSC MODEL
2 WITHOUT DSC MODEL
1
1
1
2
2
2
2
1
1
1
1