JVC KW-XC8 - Page 63

1-59
KW-XC828
VDD WPIN SCL SDA
A0 A1 A2 GND
8 VDD
7 WPIN
6 SCL
5 SDA
A0 1
A1 2
A2 3
GND 4
16kbit EEPROM allay
11bit
11bit
8bit
Address
decoder
Slave Ward
Address resister
Data
resister
START
STOP
ACK
Control circuit
High voltage osc circuit
Power supply
voltage det.
VDD
GND
A0,A1,A2
SCL
SDA
WPIN
-
-
I
I
I/O
I
Power supply.
GND
No use connect to GND.
Serial clock input.
Serial data I/O of slave and ward address.
Write protect terminal.
Symbol
I/O
Function
BR24C16F-X (IC702) : EEPROM
1. Pin layout
3. Block diagram
2. Pin function
1 2 3 4 5 6 7 8 9
10
GND OUT1 P1
VZ IN1 IN2
VCC1
VCC2 P2
OUT2
Input Output
Mode
IN1 IN2 OUT1 OUT2
Brake
0 0 0 0
1 0 1 0
0 1 0 1
1 1 0 0
CLOCKWISE
COUNTER-CLOCKWISE
Brake
LB1641 (IC402) : DC motor driver
1. Pin layout
2. Pin function