JVC MX-S6MD - Page 57

MX-S6MD
1-57
A0
A1
A2
GND
1
2
3
4
Vcc
WP
SCL
SDA
8
7
6
5
1kbit EEPROM ARRAY
7bit
ADDRESS
DECODER
SLAVE/WORD
ADDRESS REGISTER
7bit
8bit
DATA
REGISTER
CONTROL LOGIC
HIGH VOLTAGE GEN.
Vcc LEVEL DETECT
ACK
START
STOP
BR24C01AFV-W-X (IC201) : EEPROM
1.Pin layout
2.Block diagram
3.Pin function
A0 A1 A2 GND
Vcc WP SCL SDA
Pin name I/O
Function
Vcc
GND
A0,A1,A2
SCL
SDA
WP
-
-
IN
IN
IN / OUT
IN
*1 An open drain output requires a pull-up resister.
Power supply
Ground (0v)
Slave address set
Serial clock input
Slave and word address,
serial data input, serial data output *1
Write protect input