JVC XV-S402SL - Page 45

XV-S300BK/XV-S332SL/XV-S402SL/XV-S403SG
45
4.17.6 Pin function (ZIVA-4.1-PB0 : 5/5)
Pin No. Symbol I/O Description
170 DVD-DATA7/CDG-SCLK I DVD parallel compressed data from DVD DSP. or CD-G clock indicating
sub code data clock input or output
171 VDACK I In synchronous mode, bit stream data acknowledge. Asserted when DVD
data is valid. Polarity is programmable
172 VREQUEST O Bit stream request
173 VSTROBE I Bit stream strobe
174 ERROR I Error in input data
175 VDD_3.3 - Power supply terminal 3.3V
176 RESERVED I Tie to VSS or VDD_3.3 as specified in table 1
177 VDD_3.3 - Power supply terminal 3.3V
178 VSS - Connect to ground
179 NC - Non connect
180 RESERVED I Tie to VSS or VDD_3.3 as specified in table 1
181 NC - Non connect
182 HADDR0 I Host address bus. 3-bit address bus selects one of eight host interface registers
183 HADDR1 I Host address bus. 3-bit address bus selects one of eight host interface registers
184 HADDR2 I Host address bus. 3-bit address bus selects one of eight host interface registers
185 RESERVED I Tie to VSS or VDD_3.3 as specified in table 1
186 RESERVED I Tie to VSS or VDD_3.3 as specified in table 1
187 RESERVED I Tie to VSS or VDD_3.3 as specified in table 1
188 VSS - Connect to ground
189 VDD_2.5 - Power supply terminal 2.5V
190 RESERVED I Tie to VSS or VDD_3.3 as specified in table 1
191 VSS - Connect to ground
192 VDD_3.3 - Power supply terminal 3.3V
193 RESERVED I Tie to VSS or VDD_3.3 as specified in table 1
194 RESERVED I Tie to VSS or VDD_3.3 as specified in table 1
195 RESERVED I Tie to VSS or VDD_3.3 as specified in table 1
196 RESERVED I Tie to VSS or VDD_3.3 as specified in table 1
197 HDATA7 I/O The 8-bit bi-derectional host data through which the host writes data to
the decoder code.
198 VSS - Connect to ground
199 HDATA6 I/O The 8-bit bi-derectional host data through which the host writes data to
the decoder code.
200 HDATA5 I/O The 8-bit bi-derectional host data through which the host writes data to
the decoder code.
201 HDATA4 I/O The 8-bit bi-derectional host data through which the host writes data to
the decoder code.
202 HDATA3 I/O The 8-bit bi-derectional host data through which the host writes data to
the decoder code.
203 HDATA2 I/O The 8-bit bi-derectional host data through which the host writes data to
the decoder code.
204 VDD_3.3 - Power supply terminal 3.3V
205 VSS - Connect to ground
206 HDATA1 I/O The 8-bit bi-derectional host data through which the host writes data to
the decoder code.
207 HDATA0 I/O The 8-bit bi-derectional host data through which the host writes data to
the decoder code.
208 CS
I Host chip select input