Kenwood TR-2600A - PLL Section

TR-2600A/E
CIRCUIT
DESCRIPTION
@ PLL section
The
VCO
Q10
:
2SK192A
uses
a
grounded-drain
Colpitts
low.
When
switching
transistor
Q7
turns
off,
the
emitter
circuits
of
Q1,
Q2
and
Q3
switch
off,
inhibiting
both
trans-
oscillator.
During
reception,
D8
conducts
to
connect
TC6
fe
ee
raed
=e
|
to
the
oscillator,
thus
lowering
the
VCO
frequency.
{
gl
R33
R36
47
1
When
the
frequency
is
140
to
149.995MHz,
D16
connects
|
a
|
xray,
|
09
560K
=
|
TCS
to
the
oscillator,
again
lowering
the
VCO
frequecy.
|
7
On
OP
Oe
ag
8
og
o
L25
and
C85
in
the
collector
circuit
of
Q14
serve
as
a
peak-
e
”
8
3P
|
CP)
aT"
i
ing
circuit
to
improve
the
frequency
response.
In
the
|
Pr
Pa
TBO
Ee
Cate
emitter
circuit
of
Q15,
D12
adds
C84
in
parallel
with
R59
hen
on
oT
x
to
boost
the
stage
gain
during
transmission
and
lower
the
|
!
27
a
9
—
la
S
O
gain
during
reception.
NS
=
LN
9
ote
ee
Under
normal
conditions
(During
phase
Lock),
!C1
:
ee
<
om
OOS
eke
He
|
MC145155P
pin
8
is
high,
whereas
if
the
PLL
unlocks,
it is
LSS
NT
OO!
|
mission and reception.
IC1
©
MC145155P
is
a
PLL
IC
containing
a
reference
oscil-
lator,
frequency
divider,
phase
comparator
latch
and
pro-
gram
counter.
In
this
unit,
this
IC
is
used
to
operate
the
Fig. 6 VCO circuit
Lock 8
a.
follwing:
RA2 © 2
see 918 RAQ © 18
~
py
teeter
yey
yay
oot pet fo
'R Phase
REF
our
9/8
o<]
Ves
7
Detector
B45
PDout
fy
A
in
®
;
>O
14-Bit
+
N
Counter
Detector
3
B
9
av
4
Yoo
ZEBSSEMAESSE
“0
swa
:
BERESRSREER
ERE
~
ee
Clock
©
al
Fig.
7
MC145155P
Block
diagram
(TX
unit
1C1)
RESET SW
——
oOocs
“LL when unlocked
(fault)
UL
To microprocessor
YJ
If
a
logic
Jevel
high
“unlock”
signal
is
input
.
\F
input
©
to
the
microprocessor
during
reset,
no
reset
occures. Therfore, the UNL pin is auto-
matically pulled to a logic level low.
98 cif
MC145155P
10 11 12 16
© EN
Voo © DAT
© CLK
Relation
between
respective
waveforms
—
On
completion
of
keyboard
input,
one
cycle
is
output
(approx.
5
to
10
msec.)
ELL
oy
Ui
pat
i}
~t
H1
I i Apes ie iM
CLK ut restr —t
Fig. 8 MC145155P Operation