Korg SDD-1200 - Circuit Descriptions

6. CIRCUIT DESCRIPTIONS
1. SYSTEM EXPLANATION
The SDD-1200 is a Dual Digital Delay that includes
KORG's custom LSI UPD65010CW-133 (Gate Array)
and consists of 2 independent systems. Since using
two dynamic RAM of 256K bits (4 bits x 64 words for
each unit), there is totally 128K words. It uses 12 bits
(3 words) per sampling. That is, if the sampling fre
quency is 42.66KHz, SDD-1200 provides a maximum
delay time of 1024msec.
2. MAIN CIRUIT EXPLANATION
■SIGNAL INPUTS
The audio signal input to INPUT A is buffered at
FET (F101), and adjusted to the adaquete level by
INPUT LEVEL VR (VR1) on the front panel, and
then amplified about 4 times as much by OP AMP
(1/2 IC101). This signal goes through the MIXER
(1/2 IC101) mixing with Feedback Input, and the
mixed signal is filtered by the FILTER (fc =
16KHz), consists of transistors (Q101, Q102), then
compressed at Compressor Circuit, consists of
Compressor (1/2 IC107) and OP AMP (1/2 IC106),
and pre-emphasized by CR which consists of
C132, R153andR154.
The output signal from Compressor Circuit goes
through the S/H Circuit, which consists fo13700
(1/2 IC111) and FET (F105) and digitalized at the
A/D Converting Comparator (IC110). Then it inputs
to Gate Array (IC112) as digital data.
[Note? f
11. IC 13700 is a high-speed analog switch controll-!
[ ed by the signal from SH terminal of the Gate Ar-i
I ray. The frequency of the signal is the sampling I
I frequency. I
I I
[2. Most part of the circuit to convert S/H signal from!
i analog to digital is in the Gate Array. Only high-i
| speed Comparator (IC110) is in external. '
I SIGNAL OUTPUT
The effect signal conducted at the Gate Array out
puts from D00 - D011 of the Gate Array (IC112) as
a 12-bit digital data and converted to analog data
by the Block Resistor (RA101), which consists of
R-2R, and goes through the S/H Circuit, which
consists of 13700 (1/2 IC111) and FET (F106).
Then it goes through LPF (consists of Q103) to
eliminate the clock signal used for sampling, then
pass through Expander Circuit, which consists of
expander (1/2 IC107), and OP AMP (1/2 IC106) to
bring the compressed dynamic range back to nor
mal.
This signal is output after passing through the
Filter Circuit (Hi-cut, Lo-cut) and Output Mixer Cir
cuit.
ICONTROL
Since a normal Rotary VR is used for selecting
Delay Time range (2ms, 8ms, 32ms, 128ms,
512ms, 1024ms), the Range Selecting Circuit con
sists of Compators (IC 109, IC108). See below for
details.
To prevent noise when unit is turned on or when
the delay time is changed, the Gate Array outputs
mute signal.
MUTE...for stopping S/H "H" is active
MUTB...for stopping Expander "L"is active
Clock Oscillation Circuit consists of 74HC00
(IC113) and oscillates 32 times faster than the
Sampling Frequency. A transistor (Q105) is used
as Fixed Current Circuit) to change frequency
logarithmically by linear control voltage (signal
modulated by Factor + Modulation).
Scan by Manual Manor
http://www.markglinsky.com/ManualManor.html