Programming Cables
User Guide
© 2009-2019 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
18 FPGA-UG-02042-26.2
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Revision History
Revision 26.2, May 2019
Added Disclaimers section.
Programming Flywire and
Connection Reference
Updated Table 6.1. Pin and Cable Reference.
Added MachXO3D
Added CRESET_B to Crosslink I
2
C.
Updated items under I
2
C Port Devices
Added Platform Manager II.
Changed order of ispPAC.
Updated items under I
2
C Port Devices.
Changed Power Manager II to Platform Manager II and updated I2C: SDA value.
Changed ASC to L-ASC10
Updated footnote 4 to include ispClock devices.
Adjusted trademarks.
Corrected entries in the Slave SPI Port Devices section of Table 6.1.
Revision 26.0, April 2018
Changed document number from UG48 to FPGA-UG-02024.
Updated document template.
Removed redundant information and changed link to www/latticesemi.com/software.
Programming Cable Pin
Definitions
Updated Programming Cable Pin names in Table 3.1. Programming Cable Pin Definitions.
Programming Flywire and
Connection Reference
Replaced Table 2. Flywire Conversion Reference and Table 3 Recommended Pin Connections
with a single Table 6.1 Pin and Cable Reference.
Moved Table 10.1. Programming Cable Feature Summary under Ordering Information.
Revision 25.0, November 2016
Programming Flywire and
Connection Reference
Revised Table 3, Recommended Pin Connections. Added CrossLink device.
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