III
INT----+-'
INTA
-----+-----~
1080I1085
LATCH"
AIIMED
EARLIEST
IR
CAN
BE
REMOVED
LATCH'
'EDGE
TRIGGERED
1iI0DE
ONLY
AIIMED
Referring back
to
Figure 16, the
timing
requirements
for
interrupt triggering
is
shown.
like
the level triggered
mode,
in
the edge triggered mode the request on the IR
input
must
remain active
until
after
the
falling edge
of
the
first
INTA pulse for that particular interrupt. Unlike
the level triggered mode, though, after the interrupt
request
is
acknowledged
its
IAR latch
is
disarmed. Only
after the IR input goes inactive will the IAA latch again
become armed, making
it
ready
to
receive another inter-
rupt request (in the level triggered mode, the IRA
latch
is
always armed). Because of the way the edge triggered
mode functions,
it
is
best
to
use a positive level
with
a
negative pulse
to
trigger the IA requests.
With
this
type
of
input, the trailing edge
of
the pulse causes the inter-
rupt and the maintained positive level meets the neces-
sary
timing
requirements (remaining high
until
after the
interrupt acknowledge occurs). Note that the IR7 default
feature mentioned in the "level triggered
mo~"
section
also works
for
the edge triggered mode.
Depending upon the particular design and application,
the edge triggered mode has various uses. Because
of
its
edge lockout operation,
it
is
best used
in
those
applications where repetitious interrupt generation
isn't
desired.
It
is also very useful in systems where the inter·
rupt request is a pulse (this should
be
in the form
of
a
negative pulse to the 8259A). Another possible advan-
tage
is
that
it
can be used with the automatic
EOI
mode
without the cautions in the level triggered mode. Over-
all, in most cases, the edge triggered mode
simplifies
operation for the user, since the duration
of
the interrupt
request at a positive level
is
not usually a factor.
3.4 INTERRUPT STATUS
By means of software contrOl, the user can interrogate
the status
of
the 8259A. This allows the reading of the
internal interrupt registers, Which may prove useful for
interrupt control during service routines.
It
also pro-
vides for a modified status
poll method of device moni·
toring, by using the poll command. This makes the
status of the internal
IR
inputs available
to
the user via
software control. The poll command offers an alterna·
tive
to
the interrupt vector method, especially for those
cases when more than
64
interrupts are needed.
46
Re.dlng
Interrupt Registers
The contents
of
each a-bit interrupt register, IAA.
ISR,
and IMR, can be read
to
update the user's program on
the present status of the 8259A. This can
be
a versatile
tool
in
the decision making process of a service routine.
giving the user more control over interrupt operations.
Before delving into the actual process of reading the
registers,
let's
briefly review their general descriptions:
IRR (Interrupt SpeCifies all interrupt levels
re-
Request Register) questing service.
ISR
(In-Service Specifies all interrupt levels
Register) which
are
being serviced.
IMR (Interrupt Specifies all interrupt levels that
Mask Register) are maSked.
To
read the contents
of
the IRA or ISR, the user must
first
issue the appropriate read register command (read
IRR
or read ISA)
to
the 8259A. Then by applying a
RD
pulse
to
the 8259A
(an
INput instruction). the contents
of.the desired register can be acquired. There is no need
to
issue a read register command every time the IRR or
ISR
is
to
be read. Once a read register command is
received by the 8259A, it "remembers" which register
has been selected. Thus. all that is necessary to read
the contents of the same register more than once is the
RD
pulse and the correct addressing
(AO
=
0,
explained
in ':Programming the 8259A"). Upon initialization. the
selection of registers defaults
to
the
IRR.
Some caution
should be taken when using the read register command
in a system that supports several levels of interrupts.
If
the higher priority routine causes
an
interrupt betwef;n
the read register command and the actual input
of
the
register contents, there's no guarantee that the same
register
will
be selected when it returns. Thus it is
Oest
in such cases to disable interrupts during the operation.
Reading the contents of the IMR is different
than
read-
ing the IRR or ISA. A read register command IS not
necessary when reading the IMR. This is because the
IMR can be addressed directly for both
reading and
writing. Thus all that the 8259A requires
lor
reading the
IMR
is
a
AD
pulse and the correct addressing
(AO
=
1,
explained in "Programming the 8259A").
To Next Page
Loading...
