Poll Command
As
mentioned towards the beginning of this application
note, there are
two
methods
of
servicing peripherals:
status
polling
and interrupt servicing. For
most
applica-
tions
the
interrupt
service method is best. This is
because
it
requires the least amount
of
CPU time, thus
increasing system throughput. However, for certain ap·
plications,
the
status poll method may
be
desirable.
For
this
reason, the 8259A supports polling operations
with
the
poll command. As opposed
to
the conventional
method
of
polling, the poll command offers improved
device servicing and increased throughput. Rather than
having the processor poll each peripheral in order
to
find the actual device requiring service, the processor
polls
the 8259A, This allows the use
of
all the previously
mentioned
priority
modes and commands. Additionally,
both
polled and interrupt methods can be used
within
the
same program.
To use
the
poll command the processor must
first
have
its
interrupt request pin disabled. Once
the
poll com·
mand is issued, the 8259A will treat the next
(CS
quali·
fied)
RD
pulse issued
to
it
(an
INput instruction) as an in·
terrupt
acknowledge. It
will
then set
the
appropriate
bit
in the ISR, if there was
an
interrupt request, and enable a
special word
onto
the data bus. This word shows
whether an interrupt request has occurred and the
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17
In
a particular
s~stem,
Still another application
of
the
poll command
might
be
when the INT
or
INTA Signals
are not available
ThiS
might
be
the case in a large
system where a processor on one card needs
to
use
an
8259A on a
different
card, In this Instance, the poll com·
mand
IS
the
only
way
to
monitor
the Interrupt devices
and
still
take advantage
of
the
8259.4.·s
prioritizing
features, For those cases when the 8259A is using the
poll command only and
Qat
the interrupt method, each
8259A
must
receive
an
Initialization sequence (interrupt
vector) This must
be
done even though the interrupt
vector features
of
the
8259.4.
are not used, In
this
case.
the
Interrupt vector specified
in
the initialization
sequence could
be
a
"fake",
47
~
I
'
~
WO,w2=BINARY
CODE
OF
HIGHEST
PRIORITY
lEVEl
REOUESTING SERVICE
~-------
I K 1 IF AN INTERRUPT OCCURRED
Flgur.
17. Poll Word
3.5 INTERRUPT CASCADING
As
mentioned earlier, more than one 8259A can
be
used
to expand the priority interrupt scheme to up
to
64
levels
without
addillonal hardware. This method for expanded
interrupt capability is called
"cascading".
The 8259A
supports cascading operations with the cascade mode.
Additionally, the special
fully
nested mode and the buf·
fered mode are available for increased
flexibility
when
cascading 8259A's in certain applications.
Cascade Mode
When programmed in the cascade mode, basic opera·
tion
consists
of
one 8259A acting
as
a master to the
others which are serving as slaves. Figure
18
shows a
system containing a master and two slaves, providing a
total
of
22
interrupt levels.
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CS
slave's INT pin. Each slave 8259A, on the other hand,
must
be
designated during its initialization with
an
10
(0
through
7)
corresponding to which
of
the master's
IR
in·
puts
its
INT pin is connected to. This is all necessary so
the CASO-2
pins
of
the masters will
be
able
to
address
each individual slave. Note that
as
in normal operation,
each 8259A must also
be
initialized to give Its
IR
Inputs
a unique interrupt vector. More detail on the necessary
programming
of
the cascade mode is explained in "Pro·
gramming the 8259A".
Now,
with
background Information on both hardware
and software for the cascade mode,
let's go over the
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