The ADI
bit
is used to specify the address in·
terval for the MCS-80/85 mode. If a 4-byte
ad-
dress interval is to be used, ADI
must
equal
1.
For
an
8·byte address interval, ADI
must
equal
O.
The state of ADI is ignored when the 8259A
is in the MCS·86/88 mode.
The LTIM
bit
is used
to
select between the
two
IR
input triggering modes. If LTIM =
1,
the level
triggered mode is selected. If LTIM =
0,
the
edge triggered mode
is
selected.
ADI:
LTIM:
, 0 0
o 1 , 1 1
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A5-A
15: The
A5-A
15
bits
are used to select the inter-
rupt vector address when in the MCS-80/85
mode. There are
two
programming formats
that can be used
to
dp
this.
Which
one is im·
plemented depends upon the selected address
interval (ADI).
If ADI is set for the 4-byte inter·
val, then the 8259A
will
automatically insert
AO-A4
(AO,
A1=O
and A2, A3, A4=IRO-7).
Thus A5-A15
must
be user selected by pro·
gramming the
A5-A
15
bits
with
the desired
ad-
dress.
If
ADI is set
for
the 8-byte interval, then
AO-A5 are
automatically
inserted
(AO,
A
1,
A2
= 0 and A3,
A4,
A5 = IRO-7).
This
leaves
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the ICW4 operations are
to
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usee,
Il.JVV4
must
equal
1.
If they aren't used, then ICW4
needn't be issued and IC4 can equal
O.
Note
that
if
IC4 =
0,
the 8259A
will
assume operation
in the MCS-80/85 mode.
SNGL: The SNGL bit is used to designate whether or
not the 8259A is to be used alone
or
in the cas·
cade mode. If the cascade mode
is
desired,
SNGL
must
equal
O.
In
doing
this, the 8259A
will
accept ICW3 for further cascade mode pro·
gramming. If the 8259A is to be used as the
single 8259A
within
a system, the SNGL
bit
must
equal
1;
ICW3
won't
be accepted.
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