LG 32LT75/76 - Page 24

LGE Internal Use OnlyCopyright © 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 24 -
BU9580
FMI_DATA[ 0-15]
Buffer
ATA_DATA
Buffer
FMI_A
FMIREQ
FMIGNT
ATA_A
ATA_DIOW
ATA_DIOR
HDD
(SATA)
TXP/ TXN
RXP/ RXN
UPD64015
decoder
UPD61151
encoder
656_DATA
DVR_V/ Y OUT
DVR_C OUT
SCART1_DVR_R/ G/ B
SCART1_DVR_FB
SDRAM
2MB
SDRAM
8MB
SDRAM
8MB
CS5331A
5331_SDATA
5331_SCLK
5331_LPRK
SCART_AUDIO L/ R
MPENC_SDR_D
MPENC_SDR_A
VDEC_SDR_D
VDEC_SDR_A
MPENC_TS_D[ 0-7]
MPENC_TS_CLK
MPENC_TS_SYNC
MPENC_TS_TS_VAL
TDFG- G107P
74LCS157
IC601
IC602
IC603
FE_TS0_Data[ 0-7]
FE_TS0_DATA_CLK
FE_TS0_DATA_SYNC
FE_TS0_DATA_VAL
TS0_Data[ 0-7]
TS0_DATA_CLK
TS0_DATA_SYNC
TS0_DATA_VAL
LRCLK_5100
SCLK_5100[ DTV]
SPDIF
PCMDATA_5100[ DTV]
Resistor
Tr
STI5100
LDBA[0:1](Bank Select)
LDDQM[ 0:1] (Data I/O Mask)
LDDQS[ 0:1] (Data Strobe)
LDCS/ (Chip Select)
LDRAS/(Latch Row Address Strobe)
LDCAS/(Latch Column Address Strobe)
LDWE/(Write Enable)
LDCLKE(Clock Enable)
LDCLK(Clock)
LDCLKN(Inverted Clock)
TS0_DATA[ 0 :7]
TS0_DATA_CLK
TS0_DATA_VAL
TS0_DATA_SYN
YUV_D[ 0 :7]
YUV_PIXCLK
CI_EN/
CI_RST
I2C_SDA0/ SCL0
I2C_SDA1/SCL1
Array R
DIGIT_D[ 0 :7]
CLK_DIGIT
EEPROM
TS_SEL/
DTV_AUDIO_MUTE
PIO_286
PIO_287
Tr
REC_B
FOR SCART PIN8
OUT_LEFT
OUT_RIGHT
CVBS
Buffer
Buffer
DTV_LOUT
DTV_ROUT
SP_CVBS
DTV_AUDIO_MUTE_BUF
(ST5100 GPIO)
27M
32.768Khz
System time to be preserved when main
power is disconnected
CPU_WAIT(Wait input(Read/Write cycle)
FMIGNT(DVB- CI/Cable Card I/O read Strobe)
FMIREQ(DVB- CI/Cable Card I/O write Strobe)
IRQ1
FMIWE/ (Read not write)
FMICS3/ (Chip select)
FMICS1/ (Chip select)
FMIBE1/(Byte enable)
Flash
(8M)
DDR
(512Mbit)
LDA[ 0:12]
LDD[ 0:15]
FMI_A[ 1:25]
FMI_D[ 0:15]
CXA2069
DTV/MNT_LOUT
DTV/MNT_ROUT
DTV/MNT_VOUT
MUTE_LINE_DTV
(Cortez GPIO)
LRCLK_DTV
SPDIF_STI_OUT
SCLK_DTV
PCMDATA_DTV
Array R
IRQ2
FMILBA/ (Flash device load burst address/DVB- CI Cab le Card Write Enable)
FMIOE/ (Output enable/DVB-CI Cable Card output Enable)
DVR
MPENC_TS__D [ 0 :7]
MPENC_TS__CLK
MPENC_TS__VAL
MPENC_TS__SYN
MPENC_RESET_ST
2. DVR
3. STi5100 composition