LG Flatron LCD 575LE

PIN CONFIGURATION
- 27 -
3.5A STEP DOWN SWITCHING REGULATOR
OSC
OUT
OUT
GND
GND
V
CC
GND
V
CC
BOOT
1
3
2
4
5
6
7
8
9 INH
VFB
COMP
GND
GND
GND
V5.1
SS
SYNC18
17
16
15
14
12
13
11
10
D94IN162A
DIP18
OSC
OUT
OUT
GND
GND
GND
GND
V
CC
V
CC
VFB
COMP
GND
GND
GND
GND
V5.1
SS
SYNC1
3
2
4
5
6
7
8
9
18
17
16
15
14
12
13
11
19
10
20
BOOT INH
D94IN163A
SO20
Pin Configuration
L4973V3-L4973V5
L4973D3-L4973D5
PIN FUNCTIONS
PIN DIP-18 PIN SO-20 NAME DESCRIPTION
11 12 COMP E/A output to be used for frequency compensation
10 11 INH A logic signal (active high) disables the device (sleep mode operation).
If not used it must be connected to GND; if floating the device is disabled.
9 10 BOOT A capacitor connected between this pin and the output allows to drive the
internal D-MOS.
18 20 SYNC Input/Output synchronization.
7,8 8,9 Vcc Not regulated DC input voltage
2,3 2,3 OUT Stepdown regulator output.
12 13 VFB Stepdown feedback input. Connecting directly this pin to the output 3.3V
and 5.1V are obtained; a voltage divider is requested for higher output
voltages. For voltage below 3.3V see note **
16 18 V5.1 Reference voltage externally available.
4,5,6
13,14,15
4,5,6,7
14,15,16,17
GND Signal ground
1 1 OSC An external resistor connected between the unregulated input voltage and
Pin 1 and a capacitor connected from Pin 1 to ground fixes the switching
frequency. (Line feed forward is automatically obtained)
17 19 SS Soft start time constant. A capacitor connected between this terminal and
ground determinates the soft start time.
BA033 Low Saturation Voltage type 3-terminal Regulator
OUT
Reference Voltage
Vcc
1
2
3
GND
BLOCK DIAGRAM
1. Vcc
2. GND
3. OUTPUT
1
3
2
TYPE
PARTS
KIA7042
E
B
C