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4. RF Circuit Technical Brief
GSM and EDGE. An analog I/Q baseband interface is provided. The HSCSD and GPRS/EDGE
capable synthesizer is fully integrated, including all RF oscillators. A reference oscillator buffer
amplifier with three outputs is provided to simplify clock distribution. A three wire bus interface is used
for control and programming. SMARTi3G is a triple-band W-CDMA transceiver for voice and high
speed data applications. SMARTi3G features a direct conversion receiver and a direct modulation
transmitter. Analog I/Q baseband interfaces are supported. A three wire bus interface is provided for
control and programming. A second three wire bus may optionally be used for fast control of the
receiver programmable gain amplifier. Fractional-N PLL RF synthesizers including separate TX and
RX VCOs are fully integrated. Programmable logic outputs are provided to control external low noise
amplifiers, power amplifiers, and antenna switches. To avoid interference between the 2.5G and 3G
transceivers, simultaneous operation of SMARTiPM and SMARTi3G is not permitted.