LG GX500 - Page 124

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7. CIRCUIT DIAGRAM
LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All right reserved.
Only for training and service purposes
26MHz
DSX321SG-26MX502
21
34
10n
C535
10u
C520
2.2u
C521
10u
C506
Q501
1
2
3
VIO_2V62
10n
C514
100n
L501
u1.0105C
105R
K
7
.
4
S2_VBAT
C502
100n
0.1u
C503
2.2u
C504
20
5
R
K001
VAUDIO_2V5
3
05
R
K0
0
1
R504
DNI
K001
505R
VRF3_2V85
K01605R
U501
34
25
16
87
A1 VCC
B1 Y1
Y2 B2
GND A2
L502
100n
105D
K01
705R
100n
C505
TP501
TP502
VRF3_2V85
S2_VBAT
VRF2_1V5
VRTC_2V0
R508
2K
VUSB_3V1
TP504
VRF1_2V85
R509 10K
K
1
0
1
5R
VRTC_2V0
C507
15p
C508
10n
VPLL_1V5
2.2u
C509
1u
C510
C511
100n
C512
0.1u
C513
1u
0V2_CTRV
405
L
u0
1
VIO_2V62
VIO_2V62
10K
R511
215R
01
220n
C515
615C
u1
1u
C517
C518
1u
R513 DNI
C519
220n
VRF3_2V85
S2_VBAT
VRTC_2V0
u1
225C
C523
22u
C524
22p
n001
525C
205D
TP505
C526
1u
2.2u
C527
VIO_2V62
C528
1u
K22415R
X501
32.768KHz
FC-135
2 1
VIO_2V62
C529
10n
VSD2_1V8
K2.2515R
VRF3_2V85
R516 DNI
C530
1u
2.2u
C531
VSD1_1V5
TP506
8V2_BIVV
C532
1u
VRF3_2V85
C533
100n
VSD1_1V5
815R
K001
VBT_2V9
C534
0.1u
S2_VBAT
22R519
S2_VBAT
K2.2025R
C536
15p
L506
100n
VSIM_2V9
u1.0735C
0.1u
C538
VIO_2V62
100n
L507
0.47u
C539
1
2
5R
K09
3
K
1
2
25
R
C540
22u
10uL509
VMMC_1V8
VRF2_1V5
C541
22p
VSD2_1V8
VRF3_2V85
VRF1_2V85
VRTC_2V0
C542
100p
L
K
J
I
H
G
F
E
D
C
B
A
12
11
10
9
8 7 6 5 4 3 2 1
L
K
J
I
H
G
F
E
D
C
B
A
12
11
10
9
8 7 6 5 4 3 2 1
U502
9N 2N
3J
6H 5H 6G 5G 4G 6F 3
F
8E
9B 7B 2B
N8F5
N5D6
B5E6
E5
C5
N6D5
C6
N7
B6G7
H9
D9
L2H8
J2H7
E2J9
K9
L9
N4M9
G2B8
F9C9
C2C8
C7
K2H3
F2G3
D2F7
E7
D8
M2D7
H2F8
G9G8
B4H4
E9
M8N3
K8M4
M7M3
K7L4
M6L3
K6K4
M5K3
K5J4
L8F4
J8E3
L7E4
J7D3
L6D4
J6C3
L5C4
J5B3
01P
9P 2P
1P
01N
1N
01B
1B
01A
9A 2A
1UND
2UND
3UND
4UND 5UND 6UND
7UND 8UND 9UND 01UND 11UND
DQ0 IO0
DQ1 IO1
DQ2 IO2
DQ3 IO3
DQ4 IO4
DQ5 IO5
DQ6 IO6
DQ7 IO7
DQ8 IO8
DQ9 IO9
DQ10 IO10
DQ11 IO11
DQ12 IO12
DQ13 IO13
DQ14 IO14
DQ15 IO15
_CS
CLK VDD1
CKE VDD2
_WED VDD3
BA0 VDD4
BA1
_RAS
_CAS VDDQ1
LDQM VDDQ2
UDQM VDDQ3
A0
A1 VSS1
A2 VSS2
A3 VSS3
A4 VSS4
A5
A6
A7 VSSQ1
A8 VSSQ2
A9 VSSQ3
A10
A11
A12 VCC1
VCC2
_CE
ALE VCCQ
CLE
_RE
R__B VSS5
_WE VSS6
_WP VSS7
1CN 2CN 3CN 4CN 5CN 6CN 7CN 8CN 9CN
01CN 11CN 21CN 31CN 41CN
K001
325R
VSD2_1V8
22R524
525R
K001
VSD2_1V8
15p
C543
15p
C544
100R526
725R
K3.3
VSD2_1V8
K3.3
825R
C545
470n
C546
220n
VSD2_1V8
VSD2_1V8
VSD2_1V8
470n
C547
U503
9C 9E 9D 8D 6E 7E 8E 01E 01D 5H 5K 5J 01K 51J 71H 81B 71M 61P 9H 61E 61C 5G 5
F
11J 51D 41E 21J 1C 2C 3D 2D 1D 4E 2L 1H 1J 1G 1F 3K 2J 2F 2G 2K 31D 41D 51C 41C 21K 51B 71D 71B 61B 71A 01W 11W 11U 11V 21V 21W 11T 31V 21R 1
1
R
31T 21T 31U 41V 71F 6
1
H
51F 0
1
H
9J 7
1
C
8K 1
1K
61F 5
1
H
81
C
6
1
G
91
C
7
1
G
51G 7
1E
L4C13
L3B12
B13
B11
A6B14
B6C12
B5
A9
B10
F19B9
D19A10
E19A11
A16
F18A12
C11
A13
T18A15
U16A14
P17
U15U7
U19R7
M5
U18L5
N16N5
K19
R18R6
P18W9
T17V8
R19U8
R17T7
T8
U17T10
T19R9
N17T9
R16R10
H18R8
M19U10
M15
L19V9
L15U9
N15V10
M18
J18W8
M16W7
L18U4
K15
L17G19
K18
K17K9
J16B19
J19E13
L16H11
G18J10
K16A18
J17
H19
M1
P3
N1
M3
P5
P15N4
N19P1
P19U5
N18T5
W13R1
V15R4
W14R3
W15T1
U12U1
V16V1
W16W2
R13V3
T14W3
V17
U14F4
T15J4
W17G3
V18H4
W18G4
R14J3
H3
81D
81E
91W
91A
1A
4M
8C
5A
7D
4C 5D
5C
4A
1W
6V
5V 4V
2V
6U 3U
2U
2T
2R
2P
3N
2N
2M
3C
2B
1B
2A 3B
4B
3A
6D
8B
8A
7C
6C
7B
7A
11E
21E
21D 11D
01C
3E
2E
1E
1L
6W
7V 4P
6T 3T
5W 4W
4K
1K
2H
3F
9
1V
8
L
8J
0
1M
0
1L
21
L
9M
9L
1
1M
1
1L
1_NIAM_DDV 2_NIA
M
_DDV
3
_NIAM_DDV
4_NIAM_DDV 1
_
N
IAM
_SSV
2_NIAM_SSV 3_NIAM_SSV 4_NIA
M
_SSV
5
_
N
IAM
_SSV
1
_
UBE_P
D
DV
SM_SSV PE_SSV
1SM_
D
NGA
2S
M_DN
GA
XTDDV
OCVDDV
XRTDDV
GIDDDV
SMDDV
OXDDV
LLPDDV
XRDDV
OIDUAV
OI
D
UA_TABV
OIDUA_SSV
DELV
X
UAV
BIVV
1ODL_TABV 1ODL_SSV
CMMV
BSUV
CMM_BSU_WSB_TABV
OIV
MISV
2ODL_TABV
2ODL_SSV LLPV 2FRV LLP2FR_DDV
1FRV 3FRV 31FR_TABV
3ODL_SSV 1FRSSV 2FRSSV 3FRSSV
4FRSSV 5FRSSV 6FRSSV 7FRSSV
8FRSSV
9FRSSV 01FRSSV 11FRSSV 21FRSSV
31FRSSV 41FRSSV
ECRUOS_HC
ETAG_HC
1NI_ESNES 2NI_ESNES
FER_DDV
EGRAHCDDV
1NI_NACS_CU_EGRAHC
SF_ESUF_DDV
1CN 2CN 3CN
CTR_SSV CTR_DDV
M0
M1 EBU_AD0
M2 EBU_AD1
M7 EBU_AD2
M8 EBU_AD3
M9 EBU_AD4
M10 EBU_AD5
EBU_AD6
TX2 EBU_AD7
TX1 EBU_AD8
RX1 EBU_AD9
RX1X EBU_AD10
RX2 EBU_AD11
RX2X EBU_AD12
PABIAS EBU_AD13
PABS EBU_AD14
RX3 EBU_AD15
VDET EBU_WR_N
PAMODE EBU_RD_N
RX3X EBU_BC0_N
FE1 EBU_BC1_N
FE2
PAEN
RX4
VRAMP
RX4X
EBU_A0
EBU_A1
T_OUT3 EBU_A2
T_OUT4 EBU_A3
T_OUT5 EBU_A4
T_OUT6 EBU_A5
T_OUT7 EBU_A6
T_OUT8 EBU_A7
EBU_A8
CLKOUT0 EBU_A9
EBU_A10
REFR EBU_A11
XOX EBU_A12
XO EBU_A13
EBU_A14
CC_IO EBU_A15
CC_CLK EBU_A16
CC_RST EBU_A17
EBU_A18
MMCI_CMD EBU_A19
MMCI_DAT0 EBU_A20
MMCI_CLK EBU_A21
MMCI_DAT1 EBU_A22
MMCI_DAT2 EBU_A23
MMCI_DAT3 EBU_A24
TDO
TDI EBU_CS0_N
TMS EBU_CS1_N
TCK EBU_CS2_N
TRST_N EBU_CS3_N
RTCK EBU_ADV_N
EBU_RAS_N
TRIG_IN EBU_CAS_N
MON1 EBU_WAIT_N
MON2
FSYS3 EBU_SDCLKO
FSYS2 EBU_SDCLKI
EBU_BFCLKO
VBAT_SD1 EBU_BFCLKI
VSD1 EBU_CKE
SD1_FB
SD2_SD1_SUBST
VSS_SD1 FCDP_RBN
SD1_FBL
VBAT_SD2 F32K
VSD2 OSC32K
SD2_FB RESET_N
SD2_FBL
VSS_SD2
IREF1
SU_GATE A_GND
SU_GND VREF1
SU_FB
SU_ISENSE
VBAT_SU VREF2
VSS_SU IREF2
0
D_F
I
D
1
D_F
I
D
2D_FID 3D_FID 4
D_F
I
D
5
D_F
I
D
6D_FID 7D_FID
1S
C_F
I
D
2S
C_F
I
D
DC_FID
RW_FID
DR_FID D
H
_
F
ID
DV
_
F
I
D
OIPG_
2
TESER_FID
0D_FIC 1D_FIC 2D_FIC 3D_FIC 4D_FIC 5D_FIC 6D_FIC 7D_FIC
KLCP_FIC
CNYSH_FIC
CNYSV_FIC
2T
U
OKLC
OIPG_DP_FIC
OIPG_TESER_FIC
1NI_PK 2NI_PK
3
N
I
_PK
4NI_PK
5NI_PK 6
N
I
_PK
0TUO_PK 1TUO_PK 2
T
U
O
_PK
3TUO_PK
N_PE
P_PE
N_SH
MC_PE
P_SH
N_1CIM P_1CIM N_2CIM P_2CIM
CIMV
ONOM_TABV
ONOM_SSV
PTUO_ONOM NTUO_ONOM
PNI_ONOM NNI_ONOM
0KLC_1S2I
XR_1S2I
XT_1S2I
0AW_1S2I
LCS_C2I ADS_C2I
RSTM_DXT_FISU
TSRM_DXR_FISU
KLCS_FISU
SULPD_BSU
SUNIMD_BSU DXR_0TRASU
DXT_0TRASU
N_STR_0TRASU N_STC_0TRASU
0TUOPSD
0NIPSD 1NIPSD
1ESNESV_MWP_1LB
MWP_2LB MWP_3LB
HSALF_SSV
KNIS_HSALF
OHCE_KCBPL
TESER_NACS_FFO_NO
2ES
NESV_N_2TESE
R
2TUO_NACS_N_TESER_OP
BAT_ID
T
NI
_3GS
T
N
I_R
GS
SGR_PWR_ON
SGR_RESETN
PWRON
P_CIMSH_2MIS
N_CIMSH_2MIS
P_CIM_2MIS
N_CIM_2MIS
MD_BSU_2MIS
PD_BSU_2MIS
XT_TRAU_2MIS XR_TRAU_2MIS
S2_DATA[15]S2_DATA[15]
S2_DATA[15]
S2_DATA[14]S2_DATA[14]
S2_DATA[14]
S2_DATA[13]S2_DATA[13]
S2_DATA[13]
S2_DATA[12]S2_DATA[12]
S2_DATA[12]
S2_DATA[11]S2_DATA[11]
S2_DATA[11]
S2_DATA[10]S2_DATA[10]
S2_DATA[10]
S2_DATA[9]S2_DATA[9]
S2_DATA[9]
S2_DATA[8]S2_DATA[8]
S2_DATA[8]
S2_DATA[7]S2_DATA[7]
S2_DATA[7]
S2_DATA[6]S2_DATA[6]
S2_DATA[6]
S2_DATA[5]S2_DATA[5]
S2_DATA[5]
S2_DATA[4]S2_DATA[4]
S2_DATA[4]
S2_DATA[3]S2_DATA[3]
S2_DATA[3]
S2_DATA[2]S2_DATA[2]
S2_DATA[2]
S2_DATA[1]S2_DATA[1]
S2_DATA[1]
S2_DATA[0]S2_DATA[0]
S2_DATA[0]
_WR_S2
_WR_S2
_WR_S2
_RD_S2
_RD_S2
_BC1_S2
_BC1_S2
_BC0_S2
_BC0_S2
_RAS_S2
_RAS_S2
_DPRAM_CS_S2
_RAM_CS_S2
_RAM_CS_S2
_NAND_CS_S2
_NAND_CS_S2
_CAS_S2
_CAS_S2
S2_FCDP
S2_FCDP
S2_SDCLKI
S2_SDCLKI
S2_CKE
S2_CKE
GSM850_RXN
GSM850_RXP
GSM900_RXN
GSM900_RXP
DCS1800_RXN
DCS1800_RXP
PCS1900_RXN
TX_RAMP
PA_MODE_2
TXHB
TXLB
PCS1900_RXP
PA_EN
S2_PA_BAND
S2_RF_TEMP
VC2
VC1
S2_ADD[9]
S2_ADD[9]
S2_ADD[8]
S2_ADD[8]
S2_ADD[7]
S2_ADD[7]
S2_ADD[6]
S2_ADD[6]
S2_ADD[5]
S2_ADD[5]
S2_ADD[4]
S2_ADD[4]
S2_ADD[3]
S2_ADD[3]
S2_ADD[2]
S2_ADD[2]
S2_ADD[17]
S2_ADD[17]
S2_ADD[16]
S2_ADD[16]
S2_ADD[14]
S2_ADD[14]
S2_ADD[13]
S2_ADD[13]
S2_ADD[12]
S2_ADD[12]
S2_ADD[11]
S2_ADD[11]
S2_ADD[10]
S2_ADD[10]
S2_ADD[1]
S2_ADD[1]
S2_ADD[0]
S2_ADD[0]
SGR_SIM2_RST
SGR_SIM2_IO
SGR_SIM2_CLK
M_RESET
M_RESET
S2_SDCLKO
S2_SDCLKO
PO_RESET
PO_RESET
NRESET
NRESET
0AW_1S2I_2MIS
XT_1S2I_2MIS XR_1S2I_2MIS KLC_1S2I_2MIS
_DPRAM_BUSY_S2
_DPRAM_INT_S2
LCS_C2I_2S
ADS_C2I_2S
NO
RWPR
N
_V
CR_2MIS
P_VCR_2MIS
SGR_RPWRON_EN
1G NAND(LB/64Mx16bit) +512M SDR SDRAM(8Mx4x16bit)
EXT_RESET
EUSY0389001, SS
ON BOARD ARM9 JTAG & ETM INTERFACE