LG GX500 - Page 95

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Only for training and service purposes
4. TROUBLE SHOOTING
GX500 Operational Description Revision A
LG Electronics 96/143 LGE Property
4.12.2 Checking PLL Control signals
Check U401
Yes
No
No
Yes
Control Signal is OK.
See next page to check
Mobile SW & FEM.
No
Yes
Checking Flow
Check U401
Check U401
Figure 4-34. Transceiver
Waveform
Figure 4-36. PLL Control Waveform
EN Si
g
nal
(
TP1
)
is OK ?
DA
(
Data
,
TP2
)
is Normal ?
CLK
(
Clock
,
TP3
)
is Normal ?
RF_EN(TP1)
RF_CLK(TP2)
RF_DATA(TP3)
TP3 (RF_CLK)
TP1 (RF_EN)
TP2 (RF_DATA)
TP2
TP3
TP1
*SIM2-> Transceiver is embeded in BB chip.
Checking Points
RF Transceiver Circuit Diagram
Figure 4-35. Transceiver Circuit
TP401
TP402
P
0
0
0
1
6
0
4C
2
72
6BMP
1
04
U
20
19
18
17
16
15
14
13
1221
2211
3201
429
52
8
627
726
825
924
033
132
231
33
34
35
36
37
38
39
40
41
GND4
GND3
VDDMIX2V8
VDDTX2V8
TX2
TX1
VDDTX1V5
VBIAS
FE2
A 1EF
XA
8V
2SA
IB
DDV
B X
1X
R
XB
1X
R
8V2G
I
DD
DV X
2XR
A
D
2XR
K
L
C 2D
N
G
5V
1
GID
DDV
X3XR
3SYS
F 3X
R
2SYSF X4X
R
OX 4XR
X
OX 5V1A
N
LDDV
GND1
FSYS1
VDDXO2V8
EN
VDDVCO2V8
VCO_RC
VDDRX1V5
VDDRX2V8
0.1U
C411
R402
820
C416
0.1U
26MHz
DSX321SG-26M
X401
21
34
9
14
C
N
7
4
0.1U
C430
0.1U
C442
I
IX
Q
QX
26MHZ_MCLK
RF_DA
RF_CLK
RF_EN
TP1
TP3
TP2