LG NS9550F - Main System Block Diagram

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2. MAIN SYSTEM BLOCK DIAGRAM
LC78615ERF+ SERVO
AM5890
Motor Drive
A, B, C, D, E, F, PD
LD
USB_HUB_DP/DN
CS5346
MLC3730
MCS LOGIC
SPDO/SLDO/FOD/TRD
LOAD±, SLED±,
SPIN±, TR±, F±
OP_SW, CL_SW, UP_SW, DN_SW, D_SEN SE
MOT_MUTE, CLOSE, OPEN
ADC_DATA
DAC_MCLK
/BCK/LRCK
PT_L/R
AUX_L/R
AUX
USB1
Portable
CD_DIN_DOUT
CD_R/W,
BUSY,CD_16 M,
SUBSYQ,
CD_RST
CD_MCK/BCK
/LRCK/DATA
TUNER_L/R
USB2
TUNER
FRONT
MICOM
R5F100GEAFB
VFD_STB/CLK/DO/RST
STANDBY_LED,VOL_LED,
VFD_LED/REMOCON
USB_PWR_CTRL/VOL_A/B/
KEY1, 2, 3
TAS5548
PWM
FL
±
RL±
DRIVER
IRS2092
(x 4 EA)
Front : 470 W X 2 ea
Woofer : 460 W X 2 ea
Front1 : 470 W X 2 ea
16.9344 MHz
VFD
DIG301
IR
Receiver
LED_CTRL, FILE A/B,
SCRATCH A/B FAN CTRL,
MIC_VOL A/B
Volume/
Key
32.768 KHz
MCU_CS/MCU_RST
MUC_TX/RX
MIC_O_DATA0
(+3.3 V)
(+3.3 V_UCOM)
(+3.3 V_CD, VCC 1.2)
(+5 V)
(+3.3 V_USB)
(+5 V,
+3.3 V_ADC)
(+3.3 V)
M
P/UP
DECK
MECHANISM
3 Disc 1 Disc
(VCC50)
12.288 MHz
FR
±
RR±
SW
DAC IC
AZ4580
DAC IC
AZ4580
DAC IC
AZ4580
FL
RL
FR
RR
SW
FET
IRF6775
(x 12EA)
FL
RL
FR
RR
SW1
SW2
FL
RL
SW1
SW2
I2C/EXT_MUTE/RST
PWM_MCK/BCK/
LRCK
SPENA
AGL_F/R
AGL_SW
PROTEC /
SD/DCP
OTW
TH
FAN_CTL
AMP_OSC
MCS Interface
128 Mbit
SDRAM
16 MByte
Serial Flash
(+3.3 V_CD)
(+3.3 V_CD)
CLK/DAT/CE/RST/GPO2
S4308
MIC
MIC_SIG0
MIC_SIG
(+5_MIC)
MIC_DET
MIC CODEC
ADC CODEC
BT
BT_RX, BT_CTS
1 MByte
Serial Flash
24 MHz
FL1
FL2