LG StudioWorks E700B - IC PIN CONFIGURATIONS AND DATA SHEETS; Microcontroller S3 P863 A Pinout and Block Diagram

PIN CONFIGURATION
- 30 -
S3P863A
P0.0/INT0
P0.1/INT1
P0.2/INT2
P0.3
P0.4/TM0CAP
P0.5
P0.6
P0.7
P1.0/SDA1
P1.1/SCL1
VDD1
VSS1
XOUT
XIN
TEST (GND)
SDA0
SCL0
RESET
P1.2
P2.0/PWM0
P2.1/PWM1
P3.7
P3.6
P3.5
P3.4
P3.3/AD3
P3.2/AD2
P3.1/AD1
P3.0/AD0
VDD2
VSS2
P2.7/Csync-I (SOG)
Hsync-I
Vsync-I
Vsync-O
Hsync-O
Clamp-O
P2.6/PWM6
P2.5/PWM5
P2.4/PWM4
P2.3/PWM3
P2.2PWM2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
S3C8639
/C863A
(42-SDIP)
P0.0-P0.7/INT0-INT2
P2.0-P2.7
RESET
INT0-INT2
X
IN
XOUT
PWM0
PWM6
Vsync-O
Hsync-O
Clamp-O
Vsync-I
Hsync-I
Csync-I
TM0CAP
*S3C8639
- 32Kbyte ROM
- 784 Byte RAM
*S3C863A
- 48 Kbyte ROM
- 1040 Byte RAM
SCL0 SDA0
SDA1
SCL1
AD0-AD3
P3.0-P3.7
P1.0-P1.2
VDD1, VDD2
VSS1, VSS2
TEST
Port 0 Port 2
I/O Port and Interrupt
Control
SAM8 CPU
Main
Osc
8-Bit
PWM
(7-Ch)
Sync
Processor
Port 1
Port 3
ADC
Stave
Only
IIC-Bus
32/48*
Kbyte
ROM
784/1040-
Byte
Register File
8-Bit
Counter
(Tmer M0)
12-Bit
Counter
(Timer M1)
Interval
Timer
(Timer M2)
Multi-master IIC-Bus
and DDC1/2B/2Bi/2B+
BLOCK DIAGRAM