Marantz 74 CD7 - System Block Diagram; Sub Chassis and CD Mechanism Blocks; Decode, Servo, and Digital Filter Blocks; DAC and Low-Pass Filter Blocks

9 10
7. BLOCK DIAGRAM
Q102 SAA7372GP
Q103
Q104
Q304 TDA1315
8. FLAG No.
No. Flag Name Function
0 MT-OUT Motor Drive Output
1 HF-OUT TDA1302T HF si
g
nal output
2
3 HF-HPF HF Si
g
nal HPF Output
4 LDON Laser Diode Control Si
g
nal
5
6 RA Radial Motor Control Si
g
nal
(
PDM
)
7 FO Focus Motor Control Si
g
nal
(
PDM
)
8 SL Sle
g
de Motor Control Si
g
nal
(
PDM
)
9
10 DIGO Di
g
ital Audio Output Si
g
nal
11 CDR7 CD7
(
SAA7372
)
Reset Pulse
12 SILD CD7
(
SAA7372
)
Servo Parte enable Si
g
nal
13 RAB7 CD7
(
SAA7372
)
Decorde and DSP parte enable si
g
nal
14 SCDC CD7
(
SAA7372
)
data clock out si
g
nal
15 WCDC CD7
(
SAA7372
)
data word clock out si
g
nal
16 SIIO Servo pcb and Main pcb comunicatein
g
si
g
nal
17
18 LRCK SM5844AF
(
Q309
)
word clock si
g
nal
19
20
21 DADC CD7
(
SAA7372
)
data out
(
16bit
)
si
g
nal
22 36MHz Samplin
g
fre
q
uenc
y
48KHz/32KHz Master clock
23 33MHz Samplin
g
fre
q
uenc
y
44KHz Master clock
24 SDA From CPU
(
QF01
)
TO TDA1315H
(
Q304
)
data si
g
nal
25 SCL From CPU
(
QF01
)
TO TDA1315H
(
Q304
)
clock si
g
nal
26
27 REST CPU
(
QF01
)
Power on reset
28 RCDK Main pcb SIIO Latch pulse for
(
Q501
,
Q502
,
Q503
)
29 RCDG SERVO PCB SIIO Latch pulse for QF06
30
31
32
33
34
35 OSC CPU
(
QF01
)
self clock
36 OSC CPU
(
QF01
)
self clock
37
38
39
40
41 LOCK TDA1315H
(
Q304
)
unlock dela
y
ed output si
g
nal
42 EMPA TDA1315H
(
Q304
)
Deemphasis output si
g
nal
43 DACD CD7
(
SAA7372
)
data out si
g
nal
44
45
46
47
48 DMUT from CPU
(
QF01
)
to TDA1315H
(
Q304
)
mutin
g
si
g
nal
49
50 FS32 TDA1315H
(
Q304
)
32k Samplin
g
detected si
g
nal
51 FS44 TDA1315H
(
Q304
)
44.1k Samplin
g
detected si
g
nal
52 FS48 TDA1315H
(
Q304
)
48k Samplin
g
detected si
g
nal
53 SD TDA1315H
(
Q304
)
data output si
g
nal
54 WS TDA1315H
(
Q304
)
Word select output si
g
nal
55 SCK TDA1315H
(
Q304
)
data clock output si
g
nal
56 FRQ2 CD7
(
SAA7372
)
Operatin
g
clock out si
g
nal
57 UNLOCK TDA1315H
(
Q304
)
unlock output si
g
nal
58
59 COAX2 Di
g
tal I/O input COAX2 si
g
nal
60 OPT0 Di
g
tal I/O input OPTICAL si
g
nal
61
62
63
64
65
66 OUT+ Correct phase AUDIO SIGNAL
67 OUT- Inverse phase AUDIO SIGNAL
68
69 REMU Rela
y
mute b
y
POWER ON/OFF and selectin
g
FILTER mode
70
71
72
73
74
75
76
77
78
79 768FS Master clock selectin
g
output
80 256FS Master clock divided output
81 128FS Master clock divided output
82 4FS 176.4KHz before Word select si
g
nal
83 WSDA Word select for DSP
(
Q509
)
and DAC
(
QD03
,
QD53
)
176.4KHz
84 FMUT Filter select switchin
g
on time unenable for DAC
85 CLDA DSP
(
Q509
)
data clock si
g
nal
86 BCEN DSP
(
Q509
)
data clock enable si
g
nal for DAC
87 BCDA for DAC
(
QD03
,
QD53
)
data clock 5.6448MHz
88
89
90
91
92
93
94
95
96
97
98
99