Marantz PM553 - Page 6

Terminal
Connections
Terminal
Function
oe 1/0 Function
PA2 PAI ame
PAS
2
PAO
T
input
Pseudo
interrupt
request
input
terminal.
PBO 3 VDD(+5v) aia
PBI
4
int
Input
Hold
mode
request
input
terminal.
PBC
5
HOLD
ES
Input
ie
Reset
input
terminal.
PB3
6
PII
le!
;
;
PCO
7
PIO
PA3-0
Input
input
ports
A3
to
Ao
:
PC)
8
PH3
In
input
mode,
4-bit
input
and
bit
test
are
allowed.
Used for HALT mode release and request input.
PC2
9
PH2
L
PC3
PHI
PB3-0
Input
Input
ports
B3
to
Bo
:
PDO
PHO
L
In
input
mode,
4-bit
input
and
bit
test
are
allowed.
PD! PG3 PC3-0 1/0 1/0 ports C3 to Co
P02
PG2
in
input
mode,
4-bit
input
and
bit
test
are
allowed.
|
PD3
PGI
In
output
mode,
4-bit
output,
bit
set/reset
output
PEO
PGO
oars
allowed.
PE! PFS PD3-0 1/0 1/O ports D3 to Do
PE2
PF2
In
input
mode,
4-bit
input
and
bit
test
are
allowed.
é
PES
PFI
In
output
mode,
4-bit
output,
bit
set/reset
output
&
are
allowed,
|
RES
PFO
TEST
osc2
PE3-0
Output Output
ports
E3
to
Eo
OV)VSS
osc!
4-bit
output
and
bit
set/reset
are
allowed.
Input
of
output
latch
contents
in
4-bit
units
and
testing of output latch of bit is possible.
PF3-0 Output Output ports’ F3 to Fo
. 4-bit’output and bit set/reset are allowed.
Input of output latch contents in 4-bit units and
testing of output latch of bit is possible.
teed
Output port G3 to Go
4-bit output and bit set/reset are allowed.
Input of output latch contents in 4-bit units and
~O
INT
testing
of
output
latch
of
bit
is
possible.
—O
osc
|
Output
ports
H3 to
Ho
wD
OSC
2
4-bit
output
and
bit
set/reset
are
allowed.
alam
Input
of
output
latch
contents
in
4-bit
units
and
HOLD
testing
of
output
latch
of
bit
is
possible.
—O
RES
—O
TEST
Output
ports
Jo,
1
O
vDD
5
2-bit
output
and
bit
set/reset
are
allowed.
%
Input
of
output
latch
contents
in
4-bit
units
and
ONS
4
testing
of
output
latch
of
bit
is
possible.
A
Input
Terminal
operated
with
clock
signal
externally
supplied.
A
ceramic
resonatoe
and
CR
are
connected
to
the
space
between
the
X‘tal
and
this
terminals
when
using
the
loca!
clock
signal
oscillator.
+
1/0
External
terminal
of
the
resonance
circuit
for
local
clock
signal
oscillation.
ro
©
Input
Power
terminal,
usually
connected
to
+5V.
—
Connected
to
OV
of
power
supply.
4+—
flag.
Input
LSI
test
terminal,
usually
connected
to
Vgs
(OV).
flag
M579