Marantz SR4021 - Microprocessor and IC Data; IC91: TMP87 PM78 F Details; IC22: TC9163 AF Details; IC23: TC9164 AF Details

2221
IC91 : TMP87PM78F
IC22: TC9163AF
IC23: TC9164AF
8. MICROPROCESSOR AND IC DATA
PIN No. SYMBOL I/O DESCRIPTION
1,25 VDD - Power Supply Port(+5V)
3 POWER MUTE O Power Mute Control Port("L")
4 HP-IN I Headphone Detective Input Port(Active"H")
6 JOG-DOWN I
Balance, Tone Up/Down Control Port
7 JOG-UP I
8 VOLUME-DOWN I
Master Volume Up/Down Control Port("H")
9 VOLUME-UP I
10 HP-H O Headphone Detective Output Port(Active"H")
12 RDS-DATA I/O RDS IC DATA Port
13 RDS-CLK I/O RDS IC CLK Port
14 STEREO IN I Stereo Display Control Port(Active "H")
15 TUNED IN I Tuned Display Control Port(Active "H")
16 PROTECT IN I Protect Input Port
17~21 KEY MATRIX I Key Control Input Port
22,23,27,30 VSS - GND
26 Back Up I Back Up Mode port
31 X IN I
8MHz Crystal Connection Port
32 X OUT O
33 RESET I Reset Input Port(Active "L")
34 REMOTE OUT O Remote Control Data Output Port
35,36 REMOTE IN I Remote Control Data Input Port
37 SP A O Speaker "A" Relay and LED Control Port("H")
38 SP B O SPeaker "B" Relay and LED Control Port("H")
39 DISPLAY OFF O Display Off LED Control Port("H")
40 PLL CE O PLL IC(LC72131,on the Tuner Module) Enable Control Port
41 PLL DATA IN I PLL IC(LC72131,on the Tuner Module) Data Input Port
42 PLL/FUNCTION DATA O
PLL IC(LC72131,on the Tuner Module) and Function IC
(TC9163/TC9164) Data/CLK Output Port
43 PLL/FUNCTION CLK O
44 FUNCTION STB O Function IC(TC9163/TC9164) STB Output Port
46 E-VOLUME CLK O
Electronic Vol.IC(M62446AFP) Data/CLK/STB Port47 E-VOLUME DATA O
48 E-VOLUME STB O
50 VKK - FIP Power Supply Port(-27V)
52~60 FIP GRID O FIP Grid Control Port
61~82 FIP SEGMENT O FIP Segment Control Port
83~88 OPTION I Option Control Port
91 KILL-IR O KILL IR Port (Active"H")
92 KILL-FLA O KILL Flasher Port(Active"H")
93 POWER ON O Power Relay On/Off Control Port("H")
95 VIDEO SW 1 O
Video IC(NJM2595M) Control Port96 VIDEO SW 2 O
97 VIDEO SW 3 O
98 STBY LED O Standgy LED Control Port("H")
LEVEL SHIFTER
2
1
2
3
4
1
5
6
2
7
8
3
1
2
3
4
1
5
6
2
7
8
3
1
3
4
5
6
7
8
9
10
14 28
11
12
13
27
26
25
24
23
22
21
20
19
18
17
16
15
LATCH CIRCUIT
SHIFT REGISTER
LEVEL SHIFTER
LATCH CIRCUIT
L-S R-S
Vss GND VDD
L-S
L-S
L-S
L-COM
L-S
L-S
L-COM
L-S
L-S
L-COM
ST
R-S
R-S
R-S
R-COM
R-S
R-S
R-COM
R-S
R-S
R-COM
DATA
CK
I/O
P95 (S19) P94 (S18) P93 (S17) P92 (S16) P91 (S15) P90 (S14) P87 (S13) P86 (S12) P85 (S11) P84 (S10) P83 (S9) P82 (S8) P81 (S7) P80 (S6) P77 (S5/G0) P76 (S4/G1) P75 (S3/G2) P74 (S2/G3)
(S20) P96
(S21) P97
(S22) PD0
(S23) PD1
(S24) PD2
(S25) PD3
(S26) PD4
(S27) PD5
(S28) PD6
(S29) PD7
(S30) PE0
(S31) PE1
(S32) PE2
(S33) PE3
(S34) PE4
(S35) PE5
(S36) PE6
(S37) PE7
(S38) PE0
P73 (S1/G4) P72 (S0/G5) P71 (G6) P70 (G7) P57 (G8) P56 (G9) P55 (G10) P54 (G11) P53 (G12) P52 (G13) P51 (G14) P50 (G15)
VDD
VSS
VASS
VAREF
VDD
P20
TEST
(XTIN) P21
(XTOUT) P22
VSS
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
(S39) PF1 100
VKK
P07
P06
P05
P04
P03
P02
P01
P00
P17
P16
P15 (TC 2)
P14 (PPO)
P13 (DVO)
P12 (INT 2/TC 1)
P11 (INT 1)
P10 (INT 0)
RESET
XOUT
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
XIN31
VDD
P9
VFT drive circuit (automatic display)
Key scan
control
Program counter
Register banks
Stack PointerP S W
Interrupt Controller
System Controller
Standby Controller
Timing Generator
High
frequ.
Low
frequ.
Clock
Generator
Time Base
Timer
16-bit
Timer/Counters
TC1 TC2 TC3 TC4 SIO HSO
8-bit
Timer/Counters
Serial
Interfaces
P4
P47
to
P40
P3
P33
to
P30
P1
P17
to
P10
P0
P07
to
P00
P67
to
P60
VAREF
VASS
P6
(AIN7)
to
(AIN0)
P2
P22
to
P20
Inst.
Register
Inst.
Decoder
Watchdog
Timer
8-bit
A/D
Converter
Flags
ALU
RBS
Program Memory
(ROM)
Data Memory
(RAM)
I/O Ports
P97
to
P90
P8
P87
to
P80
P7
I/O Ports
P77
to
P70
P5
P57
to
P50
PIE
PIE7
to
PIE0
PIF
PIF1
to
PIF0
PID
PID7
to
PID8
Power Supply
VFT Power
Supply
Reset I/O
Test Pin
Resonator
connecting
Pins
VSS
VKK
RESET
TEST
XIN
XOUT
OUTPUT Ports
I/O Ports
LEVEL SHIFTER
2
1
2
3
1
4
5
6
2
7
8
3
1
2
3
1
4
5
6
2
7
8
3
1
3
4
5
6
7
8
9
10
14 28
11
12
13
27
26
25
24
23
22
21
20
19
18
17
16
15
LATCH CIRCUIT
SHIFT REGISTER
LEVEL SHIFTER
LATCH CIRCUIT
L-S R-S
Vss GND VDD
L-S
L-S
L-COM
L-S
L-S
L-S
L-COM
L-S
L-S
L-COM
ST
R-S
R-S
R-COM
R-S
R-S
R-S
R-COM
R-S
R-S
R-COM
DATA
CK
I/O