Page 7
© 2004 Microchip Technology Incorporated. All Rights Reserved. Introduction to the dsPIC30F Architecture (Part 2) 7
SFR Space
0x07FF 0x07FE
2 KB
SFR Space
Data Memory Map - Example*
8 KB
SRAM Space
0x0801 0x0800
X Data Space
implemented as
SRAM
8 KB
“Near” Data Memory
Addressable directly
0x1FFE
0x1FFF
0xFFFF
Unimplemented
X Data Space
0xFFFE
Optionally used by
mapping address
range into
Program Space
via PSV mechanism
0x8001 0x8000
0x27FF 0x27FE
0x0001 0x0000
MS Byte
Address
LS Byte
Address
16-bits
* Sample Data Memory
Map shown here for
dsPIC30F6014 device
A sample dsPIC30F6014 device Data Memory map is shown here.
The physical end address of RAM is hex27FF for this device. The
memory is depicted here with each word containing 16 bits. As
mentioned earlier, each byte in the dsPIC30F data space has a unique
address. Hence, two addresses are shown for each word - the even
address for the least significant byte and the odd address for the most
significant byte.
All Special Function Registers, or SFRs, are located between the
addresses hex0000 and hex07FF.
The 8 Kilo Bytes of General-Purpose SRAM starts at address hex0800.
This RAM is viewed as one linear X-space by MCU instructions as well
as non-MAC DSP instructions.
Addresses that lie in the first 8 Kilo Bytes of addressable data space
may be directly addressed by an instruction. This range of memory
addresses is known as the Near Data Space. The Near Data Space
includes the entire range of Special Function Register addresses and
ends at address hex1FFF.
Addresses beyond hex8000 can be mapped into Program Space using
a mechanism known as Program Space Visibility (PSV).
Unlike PIC
®
MCU devices, the dsPIC30F does not require any banking
of data memory.
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