Microchip Technology dsPIC33 Family Reference Manual

 2006-2019 Microchip Technology Inc. DS30009711C-page 7
I/O Ports with PPS
3.0 PERIPHERAL MULTIPLEXING
Pins can also be configured as digital inputs or outputs, and analog inputs or outputs. When
configured as digital inputs, they are either TTL buffers or Schmitt Triggers. When configured as
digital outputs, they are either CMOS drivers or open-drain outputs.
Many pins also support one or more peripheral modules. When configured to operate with a
peripheral, a pin may not be used for general input or output. In many cases, a pin must still be
configured for input or output, although some peripherals override the TRIS configuration.
Figure 3-1 shows how ports are shared with other peripherals and the associated I/O pin to which
they are connected. For some dsPIC33/PIC24 devices, multiple peripheral functions may be
multiplexed on each I/O pin. The priority of the peripheral function depends on the order of the
pin description in the pin diagram of the specific product data sheet.
Figure 3-1: Structure of Port Shared with Non-PPS Peripherals
3.1 Multiplexing Digital Input Peripheral
• Peripheral does not control the TRISx register. The TRIS bits should be maintained for input.
• PORTx data input path is unaffected. On reading the PORTx register, the status of the pin
will be read.
• Peripheral input path is independent of I/O input path with a special input buffer.
QD
CK
WR LATx/
TRISx Latch
I/O Pin
WR PORTx
Data Bus
QD
CK
Data Latch
Read PORTx
Read TRISx
1
0
1
0
WR TRISx
Peripheral Output Data
I/O
Peripheral Module
Peripheral Output Enable
PIO Module
Output Multiplexers
Peripheral Module Enable
Read LATx
0
1
Open-Drain Selection
Legend: R = Input buffer type depends on the peripheral. For more information, refer to the specific product data sheet.
Peripheral Input
R
Q

Microchip Technology dsPIC33 Specifications

General

Brand	Microchip Technology
Model	dsPIC33
Category	I/O Systems
Language	English