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MSI 845G Max - Page 67

MSI 845G Max
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Chapter 3
3-22
IRQ 3/4/5/7/9/10/11/14/15
These items specify the bus where the specified IRQ line is used.
The settings determine if AMIBIOS should remove an IRQ from the pool
of available IRQs passed to devices that are configurable by the system
BIOS. The available IRQ pool is determined by reading the ESCD NVRAM.
If more IRQs must be removed from the IRQ pool, the end user can use
these settings to reserve the IRQ by assigning an ISA/EISA setting to it.
Onboard I/O is configured by AMIBIOS. All IRQs used by onboard I/O
are configured as PCI/PnP. If all IRQs are set to ISA/EISA, and IRQ 14/
15 are allocated to the onboard PCI IDE, IRQ 9 will still be available for PCI
and PnP devices. Available settings: ISA/EISA, PCI/PnP.
Set DMAs to PnP or ISA
Press <Enter> to enter the sub-menu and the following screen appears:
DMA Channel 0/1/3/5/6/7
These items specify the bus that the system DMA (Direct Memory
Access) channel is used.
The settings determine if AMIBIOS should remove a DMA from the avail-
able DMAs passed to devices that are configurable by the system BIOS.
The available DMA pool is determined by reading the ESCD NVRAM. If
more DMAs must be removed from the pool, the end user can reserve the
DMA by assigning an ISA/EISA setting to it.

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