MSI MS-7043 - Page 54

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MS-7043 ATX Mainboard
AGP Master 1 WS Read
When [Enabled] is selected, one wait state is inserted in the AGP read cycle.
AGP Read Synchronization
The field allows you to enable or disable the AGP Read Synchronization
feature.
Top Performance
Set this item to [Enabled] to increase the system performance. Setting options: [Enabled],
[Disabled].
PCI Delayed Transaction
The chipset has an embedded 32-bit posted write buffer to support delay transactions
cycles. Select [Enabled] to support compliance with PCI specification version 2.1.
VLink 8X Supported
This item enables or disables the 8X VLink Data Rate. Setting options: [Enabled],
[Disabled].
VLink Mode Selection
This item selects the mode of VLink. Setting options: [Auto], [Mode 1], [Mode 2], [Mode
3], [Mode 4].