National Instruments 622 Series User Manual

B-20 | ni.com
Appendix B Timing Diagrams
Analog Output Timing Diagrams
The analog output timing can be broken into the following three sections:
• Input Timing—The timing for external signals to enter the M Series device and be available
on the internal signal buses.
• Internal Analog Output Timing—The timing specifications of the analog output unit itself,
to and from internal signals.
• Output Timing—The timing of exported signals going to the M Series device external
terminals.
Figure B-22 gives an overview of analog output timing.
Figure B-22. M Series Analog Output Timing
The following signals are used in Figure B-22 and in the following sections:
• Sample Clock—This signal multiplied by the digital to analog conversions. This signal is
routed to the DAC, and in every pulse, the DAC will perform a data conversion. This signal
can come directly from an external signal or can be the result of dividing down the Sample
Clock Timebase using the UI counter.
• Sample Clock Timebase—This signal can be used to generate the Sample Clock. This
signal acts as the clock for the UI counter, and a Sample Clock can be generated every
N periods of the Sample Clock Timebase by programming the UI counter accordingly. This
signal can come from an internal source (such as the board oscillator) or an external source.
• Sync Sample Clock Timebase—The Sync Sample Clock Timebase is a signal that is
generated internally and is related to the Sample Clock Timebase. How it is generated and
STAR_TRIG,
RTSI, or
PFI
STAR_TRIG_i,
RTSI_i, or
PFI_i
Internal
Sources
Sample
Clock
Timebase
Selected Pause
Selected
Start
Trigger
Other
Internal
Sources
PFI
RTSI
Pause Trigger
Start Trigger
Sample Clock
AO Timer

National Instruments 622 Series Specifications

General

Brand	National Instruments
Model	622 Series
Category	I/O Systems
Language	English