NI sbRIO-960x/962x/963x OEM Instructions & Specifications 42 ni.com
Using the System Clock to Provide Data Timestamps
At startup, the system clock of the NI sbRIO-9605/9606 resets to January 1,
1970, 12:00 a.m. (midnight), unless VBAT is implemented on the RMC.
For information about synchronizing the system clock with an SNTP time
server on the network at startup, go to
ni.com/info
and enter the Info
Code
criosntp
.
Using the Reset Button
Pressing the Reset button reboots the processor. The FPGA continues to
run unless you select the Autoload VI on device reboot boot option. Refer
to the Device Reset Options section for more information.
Note To force the device into safe mode, hold the reset button down for 5 seconds, then
release. The device will be in safe mode with output from the COM1 serial port enabled.
Table 11. USB Port Signal Descriptions
Pin Signal Name Signal Description
1 VCC Cable power (+5 V)
2 D– USB data–
3 D+ USB data+
4 GND Ground
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