NI Digital System Development Board User Manual | © National Instruments | 51
Running the FPGA VI
1. Verify that the USB cable is connected to the DSDB and host PC, and the power switch is
moved to the ON position.
2. Open the front panel of FPGA_Design.vi.
3. Click the Run button to run the VI.
4. The application compiles VHDL code and generates a bitstream file that is downloaded into
the FPGA configuration storage. The Generating Intermediate Files window opens and
displays the compilation progress. The LabVIEW FPGA Compile Server window opens
and runs. Choose compile locally. The compilation takes several minutes. See an image of
the compile server window below.
5. When the compilation finishes, click Stop Server to close the LabVIEW FPGA Compile
Server.
6. Click Close in the Successful Compile Report window as shown in the image below.