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Nellcor NPB-40 - Page 48

Nellcor NPB-40
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Technical Supplement
S-16
S3.3.3.2 Filtering Circuits
These circuits consist of two cascaded second-order filters with a break
frequency of 10 Hz. Diodes (CR1/CR2 for the red channel, CR4/CR3 for the IR
channel) connected to VREF and ground at the positive inputs of the second
amplifiers, maintain the voltage output within the range of the A/D
converter.
S3.3.4 AC Ranging
In order to achieve a specified level of oxygen saturation measurement and to
still use a standard-type combined CPU and A/D converter, the DC offset is
subtracted from each signal. Because the DC portion of the signal can be on
the order of one thousand times the AC modulation, 16 bits of A/D conversion
would otherwise be required to accurately compare the IR and red
modulations between the combined AC and DC signals. The DC offsets are
subtracted by using an analog switch to set the mean signal value to the
mean of the range of the A/D converter whenever necessary. The AC
modulation is then superimposed upon that DC level. This is also known as
AC ranging.
Each AC signal is subsequently amplified such that its peak-to-peak values
span one-fifth of the range of the A/D converter. The amplified AC signals are
then filtered to remove the residual effects of the PWM modulations and,
finally, are input to the CPU. The combined AC and DC signals for both IR
and red signals are separately input to the A/D converter.
S3.3.4.1 Offset Subtraction Circuits
Voltage dividers R53 and R49 (red), and R61 and R63 (IR), which are located
between VREF and ground, establish a baseline voltage of 2.75 V at the input
of the unity gain amplifiers U12C (red) and U12D (IR).
Whenever SPST analog switches U11A and U11D are closed by HSO0 (active
low), the DC portions of the IR and red signals create a charge, which is
stored on C54 and C46, respectively. These capacitors hold this charge even
after the switches are opened and the resulting voltage is subtracted from the
combined signal — leaving only the AC modulation output. This AC signal is
superimposed on the baseline voltage output by U12C and U12D. The IRDC
and REDDC are then filtered and input to the microprocessor on the CPU
PCB.
S3.3.4.2 AC Variable Gain Control Circuits
The AC modulations are amplified by U12A (red) and U12B (IR) and
superimposed on the baseline voltages present at the output of U12D (IR) and
U12C (red). The amplification is handled by means of the SPDT analog
multiplexing switch U13 within the feedback loop, which increases gain as
PWM0 is increased. The IRAC and REDAC are then filtered and input to the
microprocessor on the CPU PCB.
S3.3.5 Audio Output
LS1, a piezo ceramic sounder, is the audio output device. Due to its low drive
current of 2 mA maximum, no drive circuitry is needed and is driven directly
from the external output port. It is differentially driven with 2 square waves
180 degrees out of phase. The drive frequency is approximately 1480 Hz or
740 Hz and is generated by the CPU. LS1 is differentially driven to obtain
maximum audible volume.

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