Onkyo A-8690 - Page 7

YM3414 (Eight times over sampling digital filter)
OUTPUT 2
COEFFICIENT ROK
ACCUMLATER OVER OUTPUT
FLOF
SHIFTER LIMITER BUFFER
TEMPORARY
OUTPUT
—@®DL0
RAM
BUFFER
49
DRO
QD FCO
TIMING
ADDRESS
CONTROL
— sco
TD SYNCS XI XO SHE = SHR
When one DAC(TD=L):Deglitching signal of left channel (when four
times) When two DAC(TD=H):Deglitching signal of left and right
channels(when eight times)
+5V:Power supply terminal for x’tal oscillator and deglitching
signal. |
Bit clock input terminal.
Clock shown L/Rch division of input data and input timing.
16 bits serial data input terminal.
+5V:Power
supply
terminal
for
digital
signal.
When one DAC(TD=L):Output terminal for L/R channel data (When
four times) When two DAC(TD=H):Output terminal for L channel
data (when eight times)
R channel data output terminal.
Woxd clock of output data DLO/DRO.
Bit clock of output data.
Ground terminal
1DAC/2DAC selector terminal: 1DAC at low. 2DAC at high.
Asynchronous input jitter absorption synchronous signal.
Synchronous input at high level. SDSY inhibiting at low level.
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