Onkyo TX-910 - IC Block Diagram LM7001

IC BLOCK DIAGRAM AND DESCRIPTION
LM7001 (PLL synthesizer and controller)
Phase Detector PD1
XIN
XOUT
I
d
Shift Register . Latch
1
h I
I L AL
3x 4'6 511
CE CL DATA
Pin No.
1
2
3
-. .
4
.-
5
6
7
8
9
- - -. . -
10
11
12
13
14
I5
16
Terminal
XOUT
XIN
- -.
CE
CL
DATA
-
SYN
-
,\LT(1/MOI\:O
--
Em
-~
-
B03
AMIN
FMIN
VDD 1
VDD 2
PDl
PD2
Vss
Description
Connect to the 7.2 MHz crystal oscillator.
Chip enable terminal. Connect to the PLL terminal of micro processor.
Serial clock input terminal. Connect to the CLOCK terminal of micro processor.
Serial data input terminal. Connect to the DATA terminal of micro processor.
Not used.
Auto/Mono control output terminal. 'H" when Auto.
FM control signal output terminal. "L" when FM.
AM control signal output terminal. "L" when AM.
AM local oscillator input terminal.
-
FM local oscillator terminal.
Power supply terminal for back-up.
Power supply terminal.
Charge pump output of the phase detector which constitutes the PLL. High level is output when the
divided local oscillator frequency is high than the reference frequency.
In the opposite case, low level is output. Floating occurs when the frequencies matched.
The output is applied to the variable capacitor diode in the local oscillator through the low pass
filters.
Ground terminal.