Pin No. Port Descriptions I/O Vol (V)
27 VDDIO I/O pad power (3.3V) - 3.3
28 MA0 SDRAM address bus O 1.0
29 MA10 SDRAM address bus O 0
30 MA11 Not used - -
31 VSSIO I/O pad ground - 0
32 MA12 SDRAM address bus O 2.1
33 MA13 SDRAM address bus O 2.1
34 VDD Core power (1.8V) - 1.8
35 /CS0 SDRAM primary bank chip select O 2.7
36 VDDIO I/O pad power (3.3V) - 3.3
37 /RAS SDRAM command bit O 3.1
38 /CAS SDRAM command bit O 2.9
39 /WE SDRAM command bit O 3.2
40 VSSIO I/O pad ground - 0
41 /DQM0 SDRAM data byte enable O 0
42 /DQM2 SDRAM data byte enable O 0
43 MD16 SDRAM data bus I/O 0.5
44 VDDIO I/O pad power (3.3V) - 3.3
45 MD17 SDRAM data bus I/O 0.5
46 MD18 SDRAM data bus I/O 0.5
47 VSS Core ground - 0
48 MD19 SDRAM data bus I/O 0.7
49 VSSIO I/O pad ground - 0
50 MD20 SDRAM data bus I/O 0
51 MD21 SDRAM data bus I/O 1.5
52 MD22 SDRAM data bus I/O 1.0
53 VDDIO I/O pad power (3.3V) - 3.3
54 MD23 SDRAM data bus I/O 0
55 MD24 SDRAM data bus I/O 0.5
56 MD25 SDRAM data bus I/O 0.5
57 VSSIO I/O pad ground - 0
58 MD26 SDRAM data bus I/O 0.5
59 MD27 SDRAM data bus I/O 0.8
60 MD28 SDRAM data bus I/O 0
61 MD29 SDRAM data bus I/O 1.0
62 VDDIO I/O pad power (3.3V) - 3.3
63 MD30 SDRAM data bus I/O 0.7
64 MD31 SDRAM data bus I/O 0.5
65 /DQM3 SDRAM data byte enable O 0
66 /CS1 Not used O -
67 VSSIO I/O pad ground - 0
68 SPDIF S/PDIF digital audio output O 1.3
69 VSS Core ground - 0
70 AIN Digital audio input for digital micro I 3.3
71 AOUT3 Serial audio data (Left/Right CH) O 0
72 AOUT2 Serial audio data (Center/LFE CH) O 0
73 AOUT1 Serial audio data (Sound Left/Right CH) O 0
74 AOUT0 Serial audio data (Left/Right CH) O 0
75 VDDIO I/O pad power (3.3V) - 3.3
76 PCMCLK Audio DAC PCM sampling clock O 1.8
77 VDD Core power (1.8V) - 1.8
78 ACLK Audio interface serial data clock O 1.7
79 LRCLK Left/Right channel clock O 1.7
80 /SRST Reset signal O 3.3
18