Table of Contents
xiii
F113 WBSL Left shift of one hexadecimal digit (4-bit) of 16−bit data range 3 − 252
P113 PWBSL
FIFO instructions
F115 FIFT FIFO buffer definition 3 − 254...................................
P115 PFIFT
F116 FIFR Data read from FIFO buffer 3 − 256.............................
P116 PFIFR
F117 FIFW Data write to FIFO buffer 3 − 260...............................
P117 PFIFW
Basic function instructions
F118 UDC UP/DOWN counter 3 − 267.....................................
F119 LRSR Left/right shift register 3 − 270..................................
Data rotate instructions
F120 ROR 16-bit data right rotation 3 − 274................................
P120 PROR
F121 ROL 16-bit data left rotation 3 − 276..................................
P121 PROL
F122 RCR 16-bit data right rotation with carry flag data 3 − 278...............
P122 PRCR
F123 RCL 16-bit data left rotation with carry flag data 3 − 280................
P123 PRCL
F125 DROR 32-bit data right rotation 3 − 282................................
P125 PDROR
F126 DROL 32-bit data left rotation 3 − 284..................................
P126 PDROL
F127 DRCR 32-bit data right rotation with carry flag data 3 − 286...............
P127 PDRCR
F128 DRCL 32-bit data left rotation with carry flag data 3 − 288................
P128 PDRCL
Bit manipulation instructions
F130 BTS 16-bit data bit set 3 − 290......................................
P130 PBTS
F131 BTR 16-bit data bit reset 3 − 292....................................
P131 PBTR
F132 BTI 16-bit data bit invert 3 − 294....................................
P132 PBTI
F133 BTT 16-bit data bit test 3 − 296......................................
P133 PBTT
F135 BCU Number of on (1) bits in 16-bit data 3 − 298.......................
P135 PBCU
To Next Page
Loading...
