Panasonic FP-E - Page 291

High−level Instructions
3 − 27
Outline Copies two 32-bit data to the specified 64-bit area.
For the FP0R/FPΣ/FP−X, the P type high−level instruction “P8
(PDMV2)” is not available.
Program example
Ladder
Diagram
Boolean
Ladder Diagram
Address Instruction
S2 DS1
Trigger
F8 DMV2, DT10, DT20, DT3010
R0
10
11
ST R 0
F8 (DMV2)
DT 10
DT 20
DT 30
S1 32-bit equivalent constant or lower 16-bit area of 32-bit data (source)
S2 32-bit equivalent constant or lower 16-bit area of 32-bit data (source)
D Lower 16-bit area of 64-bit area (destination)
Operands
Operand
Relay Timer/Counter Register
Index
register
Constant
Inde
x
Inte
g
er
Operand
WX WY WR WL SV EV DT LD
FL
(*1)
I K H f
Index
modifier
Integer
device
S1 A A A A A A A A A A A A N/A A N/A
S2 A A A A A A A A A A A A N/A A N/A
D N/A A A A A A A A A A N/A N/A N/A A N/A
(*1) This cannot be used with the FP0R, FPΣ and FP−X.
Explanation of example
The contents of data register DT11 and DT10 and the contents of data register DT21 and DT20 are copied to
data registers DT33, DT32, DT31 and DT30 when trigger R0 turns on.
Contents
of DT11
DT30
DT31
Higher
16-bit area
Lower 16-bit
area
Contents
of DT10
[S1]
Contents
of DT21
DT32DT33
Higher
16-bit area
Lower 16-bit
area
Contents
of DT20
[S2]
[D]
F8
P8
Two 32-bit data move
(DMV2)
(PDMV2)
A
:
A
vailable
N/A: Not Available
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