High−level Instructions
3 − 37
Outline Reads data from the expansion memory area of the IC card.
Program example
Boolean Non-ladder
Ladder Diagram
Address Instruction
10
F12 ICRD , K 0 , K10 , DT100
S1
D
Trigger
S2
R0
10
11
ST R 0
F 12 (ICRD)
K0
K10
DT 100
S1 Constant for specifying the starting address of IC card expansion memory (for
source data)
S2 32−bit equivalent constant or lower 16−bit area of 32−bit data for specifying
number of words to be read
D Starting 16−bit area for storing data read from IC card (for destination)
Operands
Relay Timer/Counter Register
Index
register
Constant
Inde
Operand
WX WY WR WL SV EV DT LD FL
IX
(*1)
IY
(*2)
K H
modifier
S1 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A A A A
S2 A A A A A A A A A A N/A A A A
D N/A A A A A A A A A N/A N/A N/A N/A A
(*1) This is I0 to IC.
(*2) This is ID.
Explanation of example
10 words of data stored in addresses 0 to 9 of the IC card expansion memory area are transferred to data
registers DT100 to DT109 when trigger R0 turns on.
DT100
DT101
DT102
DT109
[S1] 0
Expansion
memory area in
IC card
[D]
Address
1
2
9
Internal memory
of CPU
[S2]
FP2SH/FP10SHFP2SH/FP10SH
F12
P12
Data read from IC card
(ICRD)
(PICRD)
Availability
FP2SH/FP10SH
A: Available
N/A: Not Available
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