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Panasonic FP-E - Page 317

Panasonic FP-E
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High−level Instructions
3 − 53
Outline Exchanges higher and lower order bytes of the specified 16-bit data.
For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions
are not available.
Program example
Ladder
Diagram
Boolean
Ladder Diagram
Address Instruction
10
F17 SWAP , DT 0
D
Trigger
R0
10
11
ST R 0
F 17 (SWAP)
DT 0
D 16-bit area to be exchanged higher and lower bytes
Operands
Operand
Relay Timer/Counter Register
Index
register
Constant
Inde
x
Operand
WX WY WR
WL
(*1)
SV EV DT
LD
(*1)
FL
(*2)
IX
(*3)
IY
(*4)
K H
Index
modifier
D N/A A A A A A A A A A A N/A N/A A
(*1) This cannot be used with the FP0 and FP−e.
(*2) This cannot be used with the FP0, FP−e, FP0R, FPΣ, FP−X.
(*3) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is I0 to IC.
(*4) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is ID.
Explanation of example
The higher and lower bytes of data register DT0 are exchanged when trigger R0 turns on.
····
Bit position
·····
DT0
15
000
12
0
11
010
8
0
7
110
4
1
3
001
0
0
R0: on
Higher byte (8-bit)
Hexadecimal
04D2
Lower byte (8-bit)
····
Bit position
·····
DT0
15
110
12
1
11
001
8
0
7
000
4
0
3
010
0
0
Hexadecimal
D2 0 4
“F17 (SWAP)” execution
F17
P17
Higher/lower byte in 16-bit data exchange
(SWAP)
(PSWAP)
A: Available
N/A: Not Available
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