Panasonic FP-E - Page 415

High−level Instructions
3 − 151
Outline Unites two 16-bit data.
For the FP0R/FPΣ/FP−X, the P type high−level instruction “P69
(PWUNI)” is not available.
Program example
Ladder
Diagram
Boolean
Ladder Diagram
Address Instruction
S2 DS1
Trigger
F69 WUNI, DT 10, D 20, DT 30, DT 4010
R0
S3
10
11
ST R 10
F69 (WUNI)
DT 10
DT 20
DT 30
DT 40
S1 16-bit equivalent constant or 16-bit area
S2 16-bit equivalent constant or 16-bit area
S3 16-bit area which stores mask data for combination or 16-bit equivalent
constant data.
D 16-bit area for storing calculated result
Operands
Operand
Relay Timer/Counter Register
Index
register
Constant
Inde
x
Inte
g
er
Operand
WX WY WR WL SV EV DT LD
FL
(*1)
I K H f
Index
modifier
Integer
device
S1 A A A A A A A A A A A A N/A A N/A
S2 A A A A A A A A A A A A N/A A N/A
S3 A A A A A A A A A A A A N/A A N/A
D N/A A A A A A A A A A N/A N/A N/A A N/A
(*1) This cannot be used with the FP0R, FPΣ and FP−X.
Explanation of example
DT10
1010 1010 1010 1010
DT20
0101 0101 0101 0101
AND
Bit inverted of DT30
0000 1111 1111 0000
AND
DT30
1111 0000 0000 1111
DT20 AND NOT (DT30)
0000 0101 0101 0000
DT10 AND DT30
1010 0000 0000 1010
DT40
1010 0101 0101 1010
[Inverted
S3]
[S1:] [S2:]
[S3:]
OR
[D:]
F69
P69
(PWUNI)
(WUNI)
16-bit data unite
A
:
A
vailable
N/A: Not Available
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