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Panasonic FP-E - Page 707

Panasonic FP-E
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High−level Instructions
3 − 443
Outline This instruction is used to perform control such as software reset,
counter disabling, and stopping pulse output.
Program example
Ladder
Diagram
Boolean
Ladder Diagram
Address Instruction
10
F0 MV , H 1, DT9052 or DT90052
Trigger
R0
1
DF
1
F0 MV , H 0, DT9052 or DT90052
S
High speed counter and
Pulse output
Controls flag area
* The high−speed counter and pulse output controls flag area
varies depending on the PLC type.
10
11
12
17
ST R 0
DF
F0 (MV)
H1
DT 9052
F0 (MV)
H0
DT 9052
S Area for storing pulse output control code or constant data
Operands
Operand
Relay Timer/Counter Register
Index
register
Constant
Inde
x
Operand
WX WY WR SV EV DT
IX
(*1)
IY
(*2)
K H
Index
modifier
S A A A A A A A A A A A
(*1) I0 to IC on FPΣ/FP−X/FP0R
(*2) ID on FPΣ/FP−X/FP0R
Description
Performs Pulse output control according to the control code specified in “S”.
This instruction is used to perform the following operations when using a Pulse output:
<Function>
1) Performing a software reset
2) Disabling the count
3) Preemptively stopping positioning/pulse output
4) Clearing control executed with pulse output−related instructions F171 or F176.
5) Setting near home input when returning to home position and changing to deceleration.
Once written, a control code is retained until the next write operation.
Precautions during programming
The near home processing is not possible when the count is prohibited during a return to home position, or
when a software reset is performed.
The near home bit is retained; however, each time you wish to perform near home processing during a return
to home position, “1” must be written to the respective bit.
FP0/FP−e/FPΣ/FP−X/FP0R
Pulse output control
F0
(MV)
Availability
FP0/FP0R/FP−e/
FPΣ/FP−X
A: Available
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