Panasonic FP-E - Page 843

High−level Instructions
3 − 579
Outline Performs bit-wise AND operation on two 32-bit data items.
For the FP0R/FPΣ/FP−X, the P type high−level instruction “P215
(PDAND)” is not available.
Program example
Ladder
Diagram
Boolean
Ladder Diagram
Address Instruction
F215 DAND, DT10, DT20, DT3010
R0
S2S1
Trigger
D
10
11
ST R 0
F215 (DAND)
DT 10
DT 20
DT 30
S1 32-bit equivalent constant or lower 16-bit area of 32-bit data
S2 32-bit equivalent constant or lower 16-bit area of 32-bit data
D Lower 16-bit area of 32-bit data for storing AND operation result
Operands
O
p
erand
Relay Timer/Counter Register
Index
register
Constant
Index
modifier
Integer
device
Operand
WX WY WR WL SV EV DT LD FL I K H f
modifier device
S1 A A A A A A A A A A A A N/A A N/A
S2 A A A A A A A A A A A A N/A A N/A
D N/A A A A A A A A A A N/A N/A N/A A N/A
Explanation of example
1 1 1 0 0 0 00 0 1 0 0 1 0 0 1
15 0
[DT10]
1 1 1 0 0 1 01 0 0 0 1 1 0 0 1
[DT11]
1 1 1 1 0 0 01 1 1 1 0 0 0 0 0
15 0
[DT20]
0 0 0 0 1 1 10 0 0 0 1 1 1 1 1
[DT21]
1 1 1 0 0 0 00 0 1 0 0 0 0 0 0
15 0
[DT30]
0 0 0 0 0 1 00 0 0 0 1 1 0 0 1
[DT31]
AND operation
F215
P215
(PDAND)
(DAND)
32-bit data AND
A
:
A
vailable
N/A: Not Available
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