Panasonic RX-D50EE

63
16 Schematic Diagram
16.1. CD SERVO CIRCUIT
A
1
2 3 4 5 6 7 8 9 10 11 12 13 14
1 2 3 4 5 6 7 8 9 10 11 12 13 14
C
D
B
E
G
H
F
A
C
D
B
E
G
H
F
A
CD SERVO CIRCUIT
SCHEMATIC DIAGRAM - 1
RX-D50EE CD SERVO CIRCUIT
: CD AUDIO INPUT SIGNAL LINE: +B SIGNAL LINE
B
TO
MAIN CIRCUIT
(CN2101)
IN SCHEMATIC
DIAGRAM - 4
22
1
C7223
25V4.7
50V1
C7227
MAZ8056GML
D7650
50V1
C7228
1K
R7217
C7218
0.082
820
R7212
C7217
0.1
C7225
1000P
R7218
1K
C7226
1000P
100
R7221
C7230
0.1
C7231
6.3V220
82K
R7211
0.1C7263
LB7262 0
0 0LB7264
LB7263
C7241
1000P
C7216
680P
C7244
0.015
C7102 0.47
0.1C7204
16V10
C7235
C7161
0.1
C7234
0.1
C7203
6.3V220
C7315
0.47
88
C7339
0.018
10K
R7328
3.3K
R7315
R7330
5.6K
10K
R7111
C7142 3300P
C7221 15P
C7222
15P
10
C7164
10C7165
C7232
6.3V220
1KR7254
470P
C7253
C7166
0.01
0.1
C7233
10R7253
R7214
470
1M
R7220
H0H169500013
X7201
S7202
CD OPEN
0.1
C7243
6
5
8
9
11
12
10
18
15
17
16
20
19
13
14
7
2
1
4
3
22
21
CN7002
S7201
REST SW
0.022C7107
C7155 0.1
0.1C7154
C7264 0.1
79
77
76
78
49
47
48
50
7471 7267 685655 58575251 5453 65 6661 6259 60 6463 7069 73 75
10
879
12 11
99
100
95
94
96
97
90
91
89
93
92
98
465 213
81
82
80
86
87
88
84
83
85
45
19 17 15 141618
43
23 21 2022
41
24
39
37
33
35
34
29
30
27
26
28
32
31
36
38
25
40
42
44
13
46
MN6627954AMA
IC7001
C7601
6.3V33
4.7
R7601
C7614
6.3V100
C7670
0.1
C7626
0.1
B1ADCF000001
Q7601
5.6R7650
LASER DRIVE
+
M7302*
SPINDLE MOTOR
DRIVER
39
+
M7301*
TRAVERSE MOTOR
C7334
10V220
C7335
0.1
C7613 0.1
6
5
8
9
10
12
11
7
2
1
4
3
14
13
16
15
CN7001
TO OPTICAL
PICKUP UNIT
28(VREF)
100
R7335
10
R7336
1K
R7332
27K
R7331
6.8K
R7323
330
R7325
1K
R7327
18K
R7349
1K
R7329
C7352
0.018
C7338
0.027
1K
R7339
GND1
191817 2015 16
14 12 9 811 1013
22 233021 282724 25 26
2167
29
345
IC7002
BA5948FPE2
A. GND
LCH OUT
TX
MCLK
RST
3.3V
STAT
7.5V
MLD
LD SW
P. GND
D. GND
BLKCK
MDATA
3.3V
REST SW
LOADING
CD OPEN SW
RCH OUT
SRDATA (ST_IN)
BCLK (ST_CLK)
LRCK (ST_REQ)
[51] ARFIN
IREF
OUTR
OUTL
TX
MLD
MCLK
NRST
STAT
FLAG
PLLF
DVDD2
AVSS1
DVSS3 BLKCK
MDATA
AVDD1
PLLF0
ARFFB
[52] DSLF
[74]
SMCK
[75] PMCK
[1] A9
[2] A11
[24] TRP
SERVO PROCESSOR
[25] FOP
RFIN X2
X1
NTEST2
A
B
F
E
D
C
PD
LD
D5
D7
D8
D9
D15
D13
D11
D10
D12
D14
D6
SDRCK
DRVDD
VREF
TRVP BA1 A0 A2 A4 A6 A8 A7 A5 A3 A1 A10 NWE BA0 PC NRAS NCAS PRAMVDD33 PRAMVDD15 PRAMVSS33 SPOUT
NTEST
D1
D3
D4
D0
D2
CENV
AVDD2
RFENV
AVSS2
IODD2
DVSS1
DVDD1
OSCIN
RFOUT
IODD1
DVSS2
DQSYTXT
ARFDC
NSRVMONON
EXT1 / LRCK (ST_REQ)
EXT2 / BCLK (ST_CLK)
EXT0 / SRDATA (ST_IN)
F
A
B
E
GND
T-
F-
F+
T+
LPD
VREF
LD GND
GND (GUARD)
GND (GUARD)
LD
VCC
ARFOUT
PVCC1
D4+D1-
PVCC2
NC NC NC NC
NC NC NC IN2 NC PC1 PC2 IN1
GND
PGND1
FO GAIN
GND
IN4 IN3
VCC
VREF
PGND2
D3+D2-
D3-D2+
D1+ D4-
CTRCRS
TRV GAIN
SRVMON0
SRVMON1
TP
90
TP
TP
38
TP
36
TP
37
TP
TP
50
TP
51(ARF)
TP
24
TP
19
TP
16
TP
14
TP
18
TP
4
TP
3
TP
2
TP
1
TP
87
TP
86
TP
10
TP
11
TP
31
TP
13
TP
9
TP
8
TP
7
TP
12
TP
17
TP
89
TP