61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
2122232425262728293031323334353637383940
BCLK
LRCK
SRDATA
DV
DD
1
DVss1
TX
MCLK
MDATA
MLD
SENSE
/FLOCK
/TLOCK
BLKCK
SQCK
SUBQ
DMUTE
STAT
/RST
SMCK
CSEL
TRV
TVD
PC
ECM
ECS
KICK
TRD
FOD
VREF
FBAL
TBAL
FE
TE
RFENV
VDET
OFT
TRCRS
/RFDET
BDO
LDON
PLLF2
DSLF2
WVEL
ARF
IREF
DRF
DSLF
PLLF
VCOF
AV
DD
2
AVss2
EFM
PCK
VCOF2
SUBC
SBCK
Vss
X1 IN
X2 OUT
V
DD
BYTCK
/CLDCK
FCLK
IPFLAG
FLAG
CLVS
CRC
DEMPH
RESY
IOSEL
/TEST
AV
DD
1
OUTL
AVss1
OUTR
RSEL
IOV
DD
PSEL
MSEL
SSEL
191817161514
1
32 4 5 6 7 8 9 10 11 12 13
TP22
A
B
TP23
TP21
C727
50V1
C728
50V1
C725
1000P
C726
1000P
R718
1K
R717
1K
C754
470P
C730
0.1
C731
6.3V220
R721
100
C732
6.3V220
C733
0.1
TP20TP18
C753
470P
A
B
CN702
C743
0.1
TP17TP14TP13TP12TP8TP7TP6TP4TP2
IHGFEDCBA
S701
(REST)
TP16
C745
1000P
A
B
C
D
E
F
G
H
I
GFEDCBAABCDEFGHI
R712
220
C718
0.22
C717
0.1
C744
8200P
R709
68K
R741 47K
R711
82K
C722
10P
X701
(16.9344MHz)
C721
10P
C724
0.1
C723
10V220
IC702
MN662790RSC
SERVO PROCESSOR/
DIGITAL SIGNAL PROCESSOR/
DIGITAL FILTER/
D/A CONVERTER
+B(2)
Rch OUT
/RST
STAT
SUBQ
SQCK
BLKCK
P.GND
MDATA
MCLK
TX
+B(1)
D.GND
LD SW
A.GND
Lch OUT
REST SW
R753
10
TP1
TP19
TP15
R742
220K
SPEED
MLD
To FL CIRCUIT(CP606) on SCHEMATIC DIAGRAM
-
13
F
SCHEMATIC DIAGRAM
-
2
R714
0
7.5V
3.3V
3.2V
3.3V
3.2V
0V
3.2V
0V
3.2V
0V
3.2V
0V
0V (3.1V)
3.2V
1.6V
3.2V(0V)
1.6V
1.6V
1.6V
1.6V
1.6V
1.6V
1.6V
1.6V
1.6V
1.6V
3.2V(0V)
0V(3.2V)
0V
0V
1.6V
1V
(1.2V)
1.6V
0V
3.2V
1.6V
1.6V
3.2V
3.2V
3V
1.5V
3.2V
1.5V
3V
PLAY
1kHz, 0dB
2.2V
P-P
0.8V
P-P
F=16.9344MHz
PLAY
0.8V
P-P
PLAY
0V
3.2V
F=75Hz
PLAY
2ms. 0.1V/DIV.
0.3V
P-P
PLAY
0.1V
P-P
2ms. 0.1V/DIV.
PLAY
0V
3.2V
T 13.3ms.
PLAY
0V
3.2V
T 13.3ms.
0.5 s. 0.2V/DIV.
3.3V
2.1V
P-P
F=16.9344MHz
3.2V
3.2V
1.5V
1.6V
3.3V
PLAY
0V
3.2V
T 13.3ms.
:POSITIVE VOLTAGE LINE :CD PLAYBACK SIGNAL LINE
SA-AK48
41