Panasonic SA-PM25 - Page 31

Pin No. Mark I/O Function
55 SUBC O Sub-Code Serial Data
Output (Not Used, Open)
56 SBCK I Clock Input for Sub-
Code Serial Data)
57 VSS I GND
58 X1 IN I
Crystal Oscillating
Circuit Input
(f= 16.9344 MHz)
59 X2 OUT O
Crystal Oscillating
Circuit Input
(f= 16.9344 MHz)
60 VDD I Power Supply Input (For
Oscillating Circuit)
61 BYTCK O Byte Clock Output (Not
Used, Open)
62 /CLDCK O
Sub-Code Frame Clock
Signal Output
(fCLDCK= 7.35 kHz
During Normal
Playback)
63 FCLK O
Crystal Frame Clock
Signal Output)
(fCLDCK= 7.35 kHz)
64 IPFLAG O
Interpolation Flag
Output
(“H”: Interpolation) (Not
Used, Open)
65 FLAG O Flag Output (Not Ised,
Open)
66 CLVS O
Spindle Servo Phase
Synchronizing Signal
Output
(“H”: CLV, “L”: Rough
Servo) (Not used, Open)
67 CRC O
Sub-Code CRC
Checked Output
(“H”: OK, “L” NG) (Not
Used, Open)
68 DEMPH O De-Emphasis DN Signal
Output (“H”:ON)
69 RESY O Frame Re-
synchronizing Signal
Output
70 IOSEL I Mode Switching
Terminal
71 /TEST I Test Input
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