Panasonic TH 42PD50U - DV-Board Block Diagram

13.24. DV-Board Block Diagram
SCL0B
SDA0B
RX_WS
RX_SD0
RX_MCLK
RX_SCK
HDMI_INT
NIRQ2
RW_WS
RX_SD0
RX_SCK
RX_MCLK
HDMI_5V_DET
JTAG_TRST
JTAG_TDO
JTAG_I_TD0
HSIB
VSIB
CLKINB2
JTAG_TMS
JTAG_TCK
HSIB CLKINB2 JTAG_TRST JTAG_TD0 JTAG_I_TD0 JTAG_TCK JTAG_TMS
HDMI_5V_DET
DDC_SCL 3.3V_SCL
DDC_SDA
3.3V_SDA
HDMI_RST
VSIB
HOTPLUG
HDMI_ROBA
HDMI_RST HDMI_INT
HDMI_ROBA
NIRQ2
123
125
117
JK5001
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
81
82
83
116
114
80
119
122
120
2868 64 6 7302926 2767
92 78 20 593 23
N.C.
CLK+
-
20
LATCH
AND
+
MAIN3.3V
LATCH
SYNCHRONIZATION
+
DV15
LATCH
-
TMDS
+
DECODER
-
DATA RECOVERY
MAIN3.3V
PLL
PANEL
D0+
D1G
JTAG_TRST
INTERFACE
IC5003
TD0_4L_BA
SCL0
HPDT
DDCG
SCL
CLKG
JD0_4PRO_HDMI
D1-
SDA0
D0G
D2G
D0-
D1+
+5V
HDMI I/F RECEIVER
+
DDC DATA
-
CLK-
HDMI_INT
CEC
RX_MCLK
D2-
D2+
VSYNC HSDA TDI HSYNC TCK HSCL TRST TMS TD0 RCLK
JTAG_TCK
VSIB
CLKIN
TO
NIRQ2 POSCL
NRESET
NIRQ
DG15
JTAG_TMS
POSDA
22
RX_SCK
RW_WS
RX_SD0
24
HDMI_RST
HDMI_5V_DET
NIRQ2
MAIN5V
HSIB
UB9
UB2
UB1
UB0
HPD
YG0
YG2
YG9
YG1
41
52
42
44
54
62
36
37
Q5003
MAIN5V
Q5001
S1D1
S2D2
Q5002
IC5017
6
5
DDC EEPROM
SCL0B
SDA0B
AUDIO MUTE
AND 5V DET
Hi;MUTE
Low;DETECT HPD5V
CABLE OUT;LOW/MUTE
CABLE IN;Hi/NORM
UB0-UB9
YG0-YG9
MAIN3.3V
4
AVR 1.5V
VIN
5
1
IC5015
VOUT
VCONT
MAIN1.5VMAIN3.3V
YG0-YG9
UB0-UB9
HDMI INTERFACE
DV
JTAG:Joint Test Action Group
5V 3.3V
26
18
17
7
2
5
4
29
30
60
13
12
11
10
9
55
59
58
44
36
34
33
53
45
32
31
15
HDMI IN
HDMI_ROBA
16
SOM2
TH-42PD50U
DV-Board Block Diagram
TH-42PD50U
DV-Board Block Diagram
THIS IS FOR REFERENCE USE ONLY.
THIS MUST BE REPLACED WITH
AN EXCHANGE BOARD ONLY.
TH-42PD50U
80