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P&E CYCLONE FX - Page 20

P&E CYCLONE FX
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User Manual For CYCLONE FX Programmers 15
clock and single bi-directional data pin.
20-Pin Keyed Mini Connector SWD Mode Pin Assignments
PIN 1 - TVCC TMS/SWDIO - PIN 2
PIN 3 - GND TCK/SWCLK - PIN 4
PIN 5 - GND NC* - PIN 6
PIN 7 - NC NC* - PIN 8
PIN 9 - NC* RESET - PIN 10
PIN 11 - NC NC* - PIN 12
PIN 13 - NC NC* - PIN 14
PIN 15 - GND NC* - PIN 16
PIN 17 - GND NC* - PIN 18
PIN 19 - GND NC* - PIN 20
*The pin is reserved for internal use within the PEmicro interface.
SWD Mode is selected from the “Communication Mode” drop-down box in the Cyclone Image
Creation Utility:
Figure 3-16: Communications Mode Selection
3.19.2.2.1 High-Performance Communications
If high-performance options are available for the selected device they will appear in the “Shift
Frequency in MHz” drop-down. CYCLONE FX programmers are capable of high-performance
communications when using certain ARM Cortex targets in SWD mode.
Figure 3-17: High-Performance Options
3.19.3 PORT C: 14-Pin Debug Connector (MPC55xx-57xx, SPC5, DSC, S32 (Power))
The Cyclone provides a standard 14-pin 0.100-inch pitch dual row 0.025-inch square header for
MPC55xx-57xx, DSC (MC56F8xxx), S32R, or STMicroelectronics’ SPC5 targets. The location of
the this header is indicated as PORT C in Figure 3-5.
MPC55xx-57xx, SPC5, or S32 (Power) Pinout
TDI 12GND
TDO 34GND
TCK 56GND
NC 78NC
RESET 910TMS
VDDE7 11 12 GND
RDY 13 14 JCOMP

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