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Pentax EPK-i - Page 6

Pentax EPK-i
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The 12 bit YCbCr signal is processed by enhancing or changing color with the front panel operation
with the FPGA (U2).
The processed YCbCr image signal is converted in to 10 bit RGB signal with the DSP (U2), and
sent to the FPGA (U39).
The 10 bit RGB signal is sent to Video process board (I700) through the connector (CN8) on Mother
board (E700) after gamma compensation with the FPGA (U39).
Meanwhile the same 10 bit RGB signal is converted into 8 bit RGB signal with the FPGA (U39).
The 8 bit RGB signal is sent to the digital display processor (U51) to be superimposed with
characters.
The 8 bit RGB signal with characters is sent to the two ways. One is to the panel link transmitter
(U56) to be converted into the image signal for DVI. And the image signal for DVI is sent to I/O-1
board (L700) with the internal cable (B521).
The other one is sent to D/A converter (U59) to be converted into RGB analog signal for VGA. And
the RGB analog signal is sent to I/O-1 board (L700) with the internal cable (B522).
The digital display processor (U51) has function to zoom up the image or to make a sub screen.
2)-2 Character generation>The FPGA (U2) handles the keyboard operation.
The FPGA (U2) detects the character inputs and sends the instructions to the digital display
processor (U51) to create the characters.
The digital display processor (U51) generates the characters and merges them to the image signal.
The fixedly displayed texts like Age are stored in the memories connected to the FPGA (U2).
These texts are also merged to the image signal with the digital display processor (U51).
The FPGA (U2) also sends the instruction to the digital image processor on Video Board (I700) in
order to create appropriate characters to meet the different display resolution.
3) Video Board (I700)
3)-1 Image signal processing-1>This board receives 10 bit RGB signal from Process board (H700)
through Mother board (E700).
The 10 bit RGB signal is converted into the 8 bit RGB signal and sent to the digital display
processor (U100, 102) to be merged with characters.
The 8 bit RGB with characters is sent to the digital video encoder (U303) through the FPGA (U301)
and encoded into RGB analog signal. Finally the signal is sent to the RGB port x2 on the back panel
through I/O-1 board (L700).
Also the 8 bit RGB with characters is sent to the digital video encoder (U310) through the FPGA
(U301) and encoded into Y/C analog signal. Finally the signal is sent to the Y/C port x2 on the back
panel through I/O-1 board (L700).
The same 8 bit RGB signal with characters is corrected with the FPGA (U301) in order to meet the
required printer color. The look-up-table in the FPGA (301) is used for the color compensation. The
corrected RGB signal is converted into RGB and Y/C analog signal with the digital video encoder
(U317 and U324) and sent to the RGB or Y/C printer port on the back panel through I/O-2 board
(M700). Note: This port is not available with 120V model.
3)-2 Image signal processing-2>This board creates DV format image signal.
The 10 bit RGB signal is converted into the 8 bit RGB signal and sent to the digital display
processor (U100) to be merged with characters.
The 8 bit RGB with characters is sent to the DV encoder (U411) through the FPGA (U301) and
encoded into DV signal. Finally the signal is sent to the DV port on the back panel through I/O-2
board (M700). Audio picked up by the microphone attached to Audio IN port on the back panel is
converted into 4 bit digital signal and sent to the DV encoder (U411) to merge to the DV signal.
3)-3 Image signal processing-3>This board receives the outer video signal to superimpose it on the main
image.
Outer video image is accepted from COMPOSITE-IN port through I/O-2 board (M700).
The outer video signal is converted into 8 bit rec656 format signal with the video decoder (U208)
and sent to the digital display processor (U100).
The outer video signal is processed as picture-in-picture data with the digital display processor
(U100) and merged to the main image.
4) Peripheral Board (G700)
4)-1 Iris control> With every type of scope, the luminance signal is converted into the 12 bit iris signal on
Preprocess board(J700).
The 12 bit iris signal is sent to the FPGA (U19) to measure if the current iris position is adequate
against the brightness set by the front panel.
The digital signal controller (U12) creates the iris reference signal (analog) by referring to the results
measured with the FPGA (U19). The iris reference signal is sent to the iris analog circuit to control
the iris.

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