Philips 32PFL7403D/10 - Diagram B09 B, STE100 P (IC 7 NA1)

Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN 150 Q528.2E LB9.
9.5.11 Diagram B09B, STE100P (IC 7NA1)
Figure 9-17 Internal block diagram and pin configuration
Block Diagram
Pin Configuration
H_17650_081.eps
150108
NRZ To Manchester
Encoder
MII
Interface / Controller
10 TX
Filter
TRANSMITTER
10/100
Scrambler
Auto
Negotiation
4B/5B
NRZ To NRZI
Encoder
Link Pulse
Generator
Binary To MLT3
Encoder
RECEIVER
10/100
Parallel to
Serial
Descrambler
Code Align
4B/5B
NRZI To NRZ
Decoder
Serial to
Parallel
NRZ To Manchester
Encoder
Link Pulse
Detector
SMART
Squelch
10 TX Filter
Clock Recovery
Clock
Generation
System
Clock
Adaptive
Equalization
BaseLine
Wander
Binary To MLT3
Decoder
Clock Recovery
REGISTERS
HW Config
Power Down
LEDS
RX Channel
TX Channel
TXP
TXN
RXP
RXN
MDC
MDIO
RXD[3:0]
RX_ER
RX_DV
RX_CLK
TX_CLK
TXD[3:0]
TX_ER
TX_EN
LEDS
HW
configuration
pins
Serial Management
10Mb/s
100Mb/s
100Mb/s
10Mb/s
Loopback
1
2
3
5
6
4
7
8
9
10
27
11
28 29 30 31 32
59 58 57 56
54
55 53 52 51 50 49
43
42
41
39
38
40
48
47
46
44
45
fde
mf0
mf1
mf3
mf4
mf2
x2
gnda
vcca
gnda
nc
vcca
txn
gnda
gnde
pwrdwn
test
reset
rip
nc nc
nc
col txd3
txd2
txd1
tx_en
txd0
tx_clk tx_er/txd4
rx_er/rxd4
gnde/i rx_clk
rdx3
mdc
mdio
vcce/i
ledr10
gnde/i
rx_dv
rxd0
rxd1
rdx2
vcce/i
22 23 24 25 26
60
crs
61
mdint
62
vcce/i
63
cfg1
64
cfg0
vcca
rxn
rxp
gnda
txp
17 18 19 20 21
37
36
34
33
35
ledtr
ledl
leds
test_se
ledc
12
13
14
15
16
vcca
iref
gnda
x1
vcca
STE100P