Philips LF501EM4 - Digital Signal Process Block Diagram

9-8
FL13.16BBLD
DIGITAL MAIN CBA UNIT
IC3001 (DIGITAL SIGNAL PROCESS)
CN3013
DIGITAL SIGNAL PROCESS
HDMI-IN1 HDMI-IN2
JK3003
DATA0(+) DATA0(-) DATA1(+) DATA1(-) DATA2(+) DATA2(-) HDMI-DATA HDMI-CLOCK
7 9 4 6 1 3
10 12 16 15
7 9 4 6 1 3
10 12 16 15
JK3002
CLOCK(+) CLOCK(-)
DATA(0-15) ADDESS(0-13)
AUDIO DECODER
HDMI I/F
HDMI SW
TO VIDEO/AUDIO BLOCK DIAGRAM
VIDEO DECODER
VIDEO SIGNAL
AUDIO SIGNAL
IC3002
(DDR2 SDRAM)
MDQL(0-7), MDQU(0-7) MA(0-13)
A/D CONVERTER
SW
VGA-R-IN VGA-G-IN VGA-B-IN
COM-VIDEO-Y/VIDEO-IN COM-VIDEO-Pb-IN COM-VIDEO-Pr-IN
DEMODULATOR /MPEG DECODER
AUDIO I/F
DIF-OUT1 DIF-OUT2 IF-AGC
IF-AGC
VGA-HSYNC VGA-VSYNC
VGA-HSYNC VGA-VSYNC
LVDS TX
AMP(L)-OUT AMP(R)-OUT
SPDIF
AUDIO(L)-IN AUDIO(R)-IN HP(L) HP(R)
DATA0(+) DATA0(-) DATA1(+) DATA1(-) DATA2(+) DATA2(-) HDMI-DATA HDMI-CLOCK CLOCK(+) CLOCK(-)
26
32 31 29 27 36 34 38 35 60 61 47
48 63 64
130
5 4 8 7
11 10
3 2 6 9
89 88 92 91 95 94 87 86 93 96
71 70 74
HDMI-IN3
7 9 4 6 1 3
10 12 16 15
JK3004
DATA0(+) DATA0(-) DATA1(+) DATA1(-) DATA2(+) DATA2(-) HDMI-DATA HDMI-CLOCK CLOCK(+) CLOCK(-)
16 15 19 18 22 21 14 13 20 23
108 105
106
101 102 122 123 120 121 118 119 114 115 116 117
99
100 103 104
107
24 23 22 21 20 19 17 16 40 39 38 37 36 35 30 29 33 32 14 13
LVDS-OD0(-) LVDS-OD0(+) LVDS-OD1(-) LVDS-OD1(+) LVDS-OD2(-) LVDS-OD2(+) LVDS-OCLK(-) LVDS-OCLK(+) LVDS-OD3(-) LVDS-OD3(+) LVDS-ED0(-) LVDS-ED0(+) LVDS-ED1(-) LVDS-ED1(+) LVDS-ED2(-) LVDS-ED2(+) LVDS-ECLK(-) LVDS-ECLK(+) LVDS-ED3(-) LVDS-ED3(+)
LCD PANEL ASSEMBLY
3. Digital Signal Process Block Diagram